IMX6 Software reset trigers Serial Bootloader

[erezsteinberg]

Hi,

I'm running a Linux 3.14.28 system on a custom iMX6DL board.

The system boots from an eMMC.

My Fuses are set a follows:

OCOTP_CFG4  <== 0x0000_5872
OCOTG_CFG5  <== 0x00100010

I need the ability to trigger a software reset. I do this by writing '0' to the WDOG1_WCR.SRS bit.

This causes the SoC to reset. But, after a ~4-5 seconds delay and the Serial Boot Loader starts (?!?!).

Looking at 8.5.3.2, it seems that if the boot flow fails, it falls back to the USB serial downloader.

I assume the eMMC should be reset when the CPU is reset. BOOT_CFG1[1] is set -- this should assert the SD_RST signal (which is connected on our PCB).

Any suggestions how to find out why resetting the CPU causes a fail with booting from eMMC?

Sincerely,

Erez

[igorpadykov]

Hi Erez

what mode are you using ldo or ldo bypass,

if ldo bypass then it will not reboot, since pmic may lower

processor voltages below sufficient for boot limit.

For that reason in Sabre SD schematic wdog reboot toggle pwron

pmic, so both pmic and processor resets.

Best regards

igor

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[erezsteinberg]

Hi Igor,

Thanks for the reply.

Although I am using ldo_bypass, the CPU does reboot.   The problem seems to be in the boot from eMMC flow. For some reason it fails, and falls-back to USB Flow.  If you look at Figures 8-10 .. 8-16, you'll see there are several places where the boot flow can fail.   Is there any way to know where the boot flow failed? (A status register somewhere?).

One other point -- I looked at the SD_RST signal, and it is asserted for 5msec when I try to reboot with the watchdog. So - eMMC is getting a RESET signal.

Regards,

Erez

[igorpadykov]

Hi Erez

one can check signals using logic analyzer

and find where boot flow stops.

If you are using ldo_bypass, also suggest to check

VDD_ARM,VDD_SOC voltages so they satisfied

datasheet requirements.

Best regards

igor

[erezsteinberg]

Hi Igor,

Thanks -- I will try to find out what's going on.

Regardless, we'll add WDOG_B signal out to PMIC to ensure the entire board resets.

By the way-- it seems worthwhile to enable the LDO mode. According to AN4725 the product life time would increase by over 50%.

Any reason not to enable LDO mode? (Sorry if the question is off topic).

Regards,

Erez

[igorpadykov]

Hi Erez

ldo bypass allows to reduce processor power consumption

due to ldo losses.

Best regards

igor