We are looking at not using Linux and developing a bare metal/RTOS application on the Cortex A55 cores of the i.MX93. I would like to know the details of the Advanced Microcontroller Bus that interconnects the i.MX93 cores and the peripherals. (There does not seem to be any mention of the AMBA in the "i.MX 93 Applications Processor Reference Manual".) Do all (M and A) cores have access to all peripherals? How is the ABM arbitration configured?
Is it correct to say that the AXI bus interactions are transparent to the software. Any memory mapped addressed peripheral data transfer does not require special "data bus access request - grant - and transfer state of the AXI bus"?
Is it correct to say that the AXI bus interactions are transparent to the software. Any memory mapped addressed peripheral data transfer does not require special "data bus access request - grant - and transfer state of the AXI bus"?
Unfortunately, the link that you have provided does not answer my question. Is there a software reference manual for the iMX9352 that complements the hardware reference manual?
