i.MX 8M Plus - Configuring LVDS channels to odd and even

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i.MX 8M Plus - Configuring LVDS channels to odd and even

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nita
Contributor I

Were using an i.MX 8M Plus SMARC module. Our SMARC evaluation board has a 1080p LVDS display where lvds0=odd and lvds1=even.

Is it possible to swap the LVDS channels in i.MX8M Plus so that it would send lvds0=even and lvds1=odd?

LDB_CTRL register has CH0_DI_SELECT and CH1_DI_SELECT bits, that might do the trick, but I'm not sure.

 

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Ohtokani_Pinzón
NXP Employee
NXP Employee

Hi all,

I've been working on a very similar community  issue: https://community.nxp.com/t5/iMX-and-Vybrid-Support/i-MX-8MP-LVDS-CH0-CH1-specifying-odd-stream-even...

And after running some tests I found that the odd / even pixel streams can be swapped trough CH0 and CH1, by inverting CH0_DI_SELECT and CH1_DI_SELECT default values. You can find a patch attached that implements this feature.

Here are some images that show the functioning of the patch: 

Figure 1: Display output  with the patch applied, using the normal cable connectionFigure 1: Display output with the patch applied, using the normal cable connection

Figure 2: Normal LVDS cables connectionFigure 2: Normal LVDS cables connection

 

The first Image shows the display output with the patch applied, and connecting the LVDS cables straightforward to the display panel (as shown in picture 2), which produces the image to be corrupted, since the even and odd pixel streams are inverted.

 

 

Figure 3: Display output  with the patch applied, using the inverted cables connectionFigure 3: Display output with the patch applied, using the inverted cables connection 

Figure 4: Inverted LVDS cables connectionFigure 4: Inverted LVDS cables connection

 

The third Image shows the display output with the patch applied, and connecting the LVDS cables inverted to the display panel (as shown in picture 4), which produces the image to be displayed correctly, since the even and odd pixel streams are swapped and the LVDS cables are inverted, proving the correct functioning of the patch.

 

My test environment is:

Board: i.MX 8MP

BSP: 6.6.36-2.1.0

dtb: imx8mp-evk-jdi-wuxga-lvds-panel.dts

Display Panel: MX8-DLVDS-LCD1

 

Best Regards!

Ohtokani

 

 

 

 

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nita
Contributor I
Hi Ohtokani
Thanks for your reply and the patch.
We ended up using lvds0=odd and lvds1=even, as it was working already.
But it's good to know that the swap works as well.
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Ohtokani_Pinzón
NXP Employee
NXP Employee

Hi @nita and @Bio_TICFSL 

I am currently working on a similar issue, and I'm about to get it solved, I can take this ticket if you don't mind.

Best Regards!

Ohtokani

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Bio_TICFSL
NXP TechSupport
NXP TechSupport

Hello,

Checking NXP documentation, “split” mode should be possible. You would be limited by using single channel each.

 

Unfortunately, we haven’t tried the split mode yet and we don’t have any device tree’s already implemented with this mode.

You can check all our available device tree overlays https://git.toradex.com/cgit/device-tree-overlays.git/tree/overlays?h=toradex_5.4-2.3.x-imx

Another solution is your suggestion of using the DSI-LVDS bridge IC.. And please contact you verdor to give you the support on your board.

Regards

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nita
Contributor I

Hi

Yes, we’re using the split mode (Dual asynchronous channels) with a single panel with two LVDS interfaces. We’re not planning to use a DSI-LVDS bridge IC.

This is already working nicely with our display

nita_0-1725970536313.png

 

Due to PCB layout reasons, we’d like to swap odd and even LVDS channels (pixels). So, is this possible with i.MX 8M Plus?

nita_1-1725970570309.png

 

Could you please explain what is the function of bits CH0_DI_SELECT and CH1_DI_SELECT in the LDB_CTRL register?

Thanks!

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