I am working on optimizing the startup speed,and ddr training takes 360ms in SPL,so I want to skip it.
I tired to note ddrphy_trained_csr and g_cdd_max after ddr training, comment the ddr training code,write the array to reg.
but it will restart after executing the malloc statement.
Does anyone know how to skip DDR training？（The following image shows my modifications）
The DDR training for SPL can't be skipped. Linux Boot Time Optimizations for i.MX8M Family (nxp.com) the AN provides Boot Time Optimization which might be helpful for you.