How to generate interrupt INT7 in GPIO1?

[Markon]

I need individual interrupt from pad GPIO_7. I configured registers connected with GPIO, IOMUXC - similar as in Interrupts with GPIO1 INT0-7 , and GIC registers. When I have interrupt handler bounded with IRQ 98, it works. When I have interrupt handler bounded with IRQ 90, it doesn't work. According to i.MX 6Dual/6Quad Applications
Processor Reference Manual, GPIO_7, ARM processor should receive also individual interrupt from GPIO_7.

How to configure iMX6Q to reveive individual interrupt, IRQ 90 ?

[b36401]

Please refer chapter 3.2.4 "Interrupt Source Code Structure" of i.MX Linux Reference Manual.

Have a great day,
Victor

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[Markon]

I'm not good in Linux. I work on FreeRTOS and I'm looking for solution connected close to hardware.

[Yuri]

Hello,

 Also, the following may be helpful.

How do I configure the INT0-INT7 interrupt request of GPIO1 source? 

https://community.nxp.com/message/311136 

Regards,

Yuri.