According to "i.MX 7Dual Applications Processor Reference Manual, Rev. 1, 01/2018" part 188.8.131.52 "Power Modes" there are two ways to enter "SNVS" mode from "RUN" mode: ONOFF long press, or SW.
Could you specify exactly the SW way? What register accesses are required to do this?
In tested design I have no ONOFF button and I would make sure that the imx7 would always be able to return to "RUN" mode without user intervention, but I want to keep SNVS battery backup to still have SNVS security features.
Thanks but I would expect more detailed explanation.
First, SW at that level should use interface provided by HW (mostly registers) and procedures provided by HW and this procedure is not defined or I am not able to find it, but definitely documentation refers to SW in few places
(Table 5-3, Figure 6-6 in RM)
is also valid for imx7d, but still it is not clear for me does it only deassert SNVS_PMIC_ON_REQ signal or does it also
make internal transition to SNVS mode and disables internal power relays (shown Fig. 5-9 in RM).
My concern is if SNVS mode is related to internal or external power relays state?
The Table 5-4. "Power Mode" suggests that it is related to external, but on the other hand if I do not use SNVS_PMIC_ON_REQ to control PMIC then transitions on Table 5-3, would be not valid.
In other words if I have system where PMIC is not controlled via SNVS_PMIC_ON_REQ line and VDD_SNVS_IN has battery backup then if imx7d is in RUN mode and I will push long ONOFF button or use procedure described here Q&A: How is mx6 PMIC_ON_REQ under SW control will the CPU be off or not ? (assuming that PMIC is still providing power to external rails)
The next thing is SNVS_PMIC_ON_REQ logic is not well documented and would be good to have some true table,diagram or table which describes it.
jimmychan could you help or someone who knows how it works?
I have a confusion here, are you using external PMIC? If yes, you don't want to connect SNVS_PMIC_ON_REQ? Can you please share the power section part of your design's schematic including processor and PMIC?
Before I will connect my PMIC to SNVS_PMIC_ON_REQ I would like to understand this logic first;)
To be serious of course I have PMIC MC34PF3000A connected PWRON to SNVS_PMIC_ON_REQ, the scenario without connecting PMIC to SNVS_PMIC_ON_REQ was only for theoretical purpose to help me better understand the aspects raised in my second post.
My assumption is that if imx7d will enter SNVS mode then SNVS_PMIC_ON_REQ signal is deasserted which turns off PMIC and this signal stays inactive until ONOFF, RTC alarm or tamper event happens, but my question was
what happen if we turn on PMIC in that state by other external signal/logic? Does CPU will turn on or not?
It would be really good if you can share the power section of PMIC and processor from your schematic. Based on that please frame the concerns with clear assumptions.
I cannot share all details but I made some block schematic which should cover all interesting things. I hope that now we can go forward and you may help me to understand to logic behind SNVS_PMIC_ON_REQ.
See diagram from reference maunal, please!
There is an internal pull-up On the pin. So even if you don't have external pull-up resistor, the pin can also normally work.
Hope the information is helpful for you.
Have a nice day!
In OFF mode there won't be any supply given to the system(All supply rails will be off including SNVS). In SNVS Mode the supply will be given however, every rails other than SNVS will be off.
As you said, there are two ways to move into SNVS mode:
Feel free to let us know if you have any further query on the same.