How to disable level 2 cache on a IMX6UL?

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How to disable level 2 cache on a IMX6UL?

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CarstenBode
Contributor II

Hello,

I want to test my application that should run finally on a IMX6G0 ( with no L2C) on the EVK board that uses a IMX6G2 ( with 128K L2C). For testing I would like to disable the L2C on the IMX6G2, but I didn´t find where.

Any idea how to disable L2C and keep L1C still enabled?

Best regards

Carsten Bode

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igorpadykov
NXP Employee
NXP Employee

Hi Carsten

seems this is not possible according to answer on arm communty

https://community.arm.com/thread/9723

Best regards

igor

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CarstenBode
Contributor II

Hi Igor,

I want to test if th IMX6G0 is fast enough for my application.

So I need a evalboard with the IMX6G0.

Best regards

Carsten

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