Hi ashok
in general you can organize in software as many layers as you wish.
Regarding hardware, i.MX28 PxP is weaker regarding multiplanes processing
compared with i.MX5x,MX6 IPU.
PXP is a fixed pipeline with performance of 1 output pixel per clock cycle.
The pipeline can, however be stalled due to memory access latency.
IPU is made up of multiple tasks executing independently (IC, DP, VDIC, IRT).
For example IPU can easily perform combining 4 planes:
two planes on DP + two planes on IC
4 layer combining would require a lot of software intervention on PXP
due to need to reconfigure the pipeline to perform iterative combining.
You can look at software API for both modules below
i.MX50_PXP_LIB_UG.pdf and imx5x_IPU_LIB_UG.pdf
IMX50_1104_LINUXDOCS_BUNDLE
You can find some examples in unit tests (imx-test package in ltib)
pxp_lib_test,pxp_v4l2_test
Best regards
igor
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