How to change dotclk phase

[davidfincher]

My board is i.Mx6DL, use lcd  800x480，RGB data begins with the falling edge of dotclk，how can I change the pixclk phase? thanks 

[Bio_TICFSL · Accepted solution]

Hi David,

I believe, the parent clock is not mapped.  You need to set the parent for LDB_DI0_SEL.

In IPU clock selection section, add the below changes in "~/linux-imx/arch/arm/mach-imx/clk-imx6q.c" file.

	/* ipu clock initialization */
	imx_clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);

or

One can look at hsync-active,vsync-active in &lcdif {

linux-2.6-imx.git - Freescale i.MX Linux Tree

then add timings for syncs using as example lvds:

https://community.freescale.com/thread/373763

Regards

[davidfincher]

Thank U.I changed it with videomode in mxc_lcdif.c