How to Troubleshoot Hardware Issues When i.MX6ULL Enters Serial Download Mode but SRAM Program Fails

[Marlon]

Problem Description:

My custom i.MX6ULL board (designed based on the official EVK) successfully enters Serial Download Mode (detected via lsusb), but the LED test program downloaded to SRAM shows no response.

Device Info:

Bus 003 Device 013: ID 15a2:0080 Freescale Semiconductor Inc. i.MX6ULL SystemOnChip in RecoveryMode

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Steps Already Taken for Debugging:

1. Eliminating DDR Issues:

Code is loaded into SRAM instead of DDR to rule out potential DDR circuit defects.

The same code works on other PCBs.

2. Confirming Serial Download Mode Status:

USB device detection confirms partial hardware functionality (e.g., USB PHY, some power rails).

3. No Errors Reported by imx_usb During Download.

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Core Issues Requiring Assistance:

1. Does successful entry into Serial Download Mode guarantee the following hardware is functional?

Power-up sequence

Critical voltages (VDD_ARM_IN, VCC_HIGH_IN, VDD_SNVS_IN, etc.)

2. Is the ALU used by BootROM the same as the one used by U-Boot?

If yes, does lsusb detection imply the processor is operational? Should I inspect for BGA solder voids?

3. Should Boot Mode pin configuration be verified even after entering Serial Download Mode?

4. Does the SRAM program require specific initialization code (e.g., disabling the watchdog)?

5. Are there other critical hardware modules to inspect (e.g., clock source, reset circuit)?

6. Which signals should be measured with an oscilloscope?

[JorgeCas · Accepted solution]

Hello,

1. Does successful entry into Serial Download Mode guarantee the following hardware is functional?

Yes, if the board is entering to serial download mode, you are following the power-up sequence.

2. Is the ALU used by BootROM the same as the one used by U-Boot?

What are you referring with ALU?

3. Should Boot Mode pin configuration be verified even after entering Serial Download Mode?

Not, once is in serial download mode, the changes in boot mode pins does not affect the boot source.

4. Does the SRAM program require specific initialization code (e.g., disabling the watchdog)?

We do not have documentation to initialize the processor and run an standalone application but DDR tool stress test.

5. Are there other critical hardware modules to inspect (e.g., clock source, reset circuit)?

I suggest you run the DDR tool stress test that will let you know if your board has hardware issues in DDR layout.

6. Which signals should be measured with an oscilloscope?

Clock signals and boot mode pins voltage levels just to confirm.

Best regards.

[Marlon]

Before this.

I am speculating whether IMX6 has a hidden core, with built-in ALU and a series of arithmetic units, specifically for the boot stage.

1. Does successful entry into Serial Download Mode guarantee the following hardware is functional?

Yes, if the board is entering to serial download mode, you are following the power-up sequence.

So my speculation is not possible.