How change the PLL2_PFD0 frequency under Linux OS

[mzl]

On my PCBA design based on i.MX6ULL. the base system is Linux OS.

Now we measured the DDR frequency with Oscilloscope and confirmed it's 307MHz. Then we read the register's value of CBCDR, CBCMR and CCM_ANALOG_PFD_528n and got the following value:

Value at address 0x20C4014 (0x76fc6014): 0x98D00

Value at address 0x20C4018 (0x76f80018): 0x24429324

Value at address 0x20C8100 (0x76fed100): 0xD018D05F

Value at address 0x20C8104 (0x76f9c104): 0xD0D8D05F

Value at address 0x20C8108 (0x76fc9108): 0xD098D05F

Value at address 0x20C810C (0x76f0c10c): 0xD098D05F

From the above registers' values, the DDR clock derived from PLL2_PFD0, and the PLL2_PFD0 frequency is 307MHz, which means that the DDR clock frequency is also configured to be 307MHz, the measured frequency from Oscilloscope matches the register configuration.

Now we want to improve the PLL2_PFD0 to be 396MHz so that the DDR clock frequency can be raised to 396MHz, in Linux system, how can we change the PLL2_PFD0 frequency? Thanks.

[mzl]

Hello, Anybody can give a help on the above new findings? Thanks a lot for the support.

[joanxie]

in linux kernel, the pll is defined in the clock driver

https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/drivers/clk/imx/clk-imx6ul.c

hws[IMX6UL_CLK_PLL2_PFD0] = imx_clk_hw_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0);
hws[IMX6UL_CLK_PLL2_PFD1] = imx_clk_hw_pfd("pll2_pfd1_594m", "pll2_bus", base + 0x100, 1);
hws[IMX6UL_CLK_PLL2_PFD2] = imx_clk_hw_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2);
hws[IMX6UL_CLK_PLL2_PFD3] = imx_clk_hw_pfd("pll2_pfd3_594m", "pll2_bus", base + 0x100, 3);

[mzl]

Hello, from the clock tree read from our PCBA. Now we got the following values:

The value 306580645 actually matches with the DDR frequency measured on our PCBA (about 307MHz).

So my question is: where could I change this value? Thanks a lot.

[mzl]

Could anybody give some help on the new findings? Thanks a lot for the support.

[joanxie]

pls refer to the link

Solved: iMX6 - how to change DDR PFD frequency - NXP Community

Configuration of Phase Fractional Dividers (nxp.com)