How are clock divisors enfc_pred and enfs_podf modified in Linux for the i.MX6ULL?

[JohnKlug]

When I set the values of enfc_pred and enfs_podf in U-Boot, they disappear in Linux.

Here is the clk_summary:

pll2_pfd2_396m           1        1        0   396000000          0
                enfc_sel              0        0        0   396000000          0
                   enfc_pred          0        0        0    66000000          0
                      enfc_podf       0        0        0    22000000          0
                         gpmi_io       0        0        0    22000000          

 Here is a register dump in Linux that matches the clk_summary:

bash# devmem2 0x20c402c w
/dev/mem opened.
Memory mapped at address 0x76fb7000.
Read at address  0x020C402C (0x76fb702c): 0x0055B6C1

Here is the register setting in U-Boot that I would like to try in Linux:

=> md.l 0x20c402c 1
020c402c: 0015b6c1 

I have been unable to find these divisors in existing device tree entries in the arch/arm/boot/dts directory.

[joanxie]

you can find this in the clock settings, I share the code here

https://github.com/nxp-imx/uboot-imx/blob/lf_v2022.04/arch/arm/mach-imx/mx6/clock.c#L64

[JohnKlug · Accepted solution]

I found out that the driver attempts to set these parameters automatically in drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c

The clock is set in this module to 22MHz for my part which has tRC_min of 30nS. This results in a read cycle and write cycle of 90nS as measured. By moving to a 66MHz clock, the read/write cycle time improves from 90nS to 30nS which matches the data sheet for my part. Why is the clock so slow? I will need to check other timings to see if they are within the specification for the part I have.