FlexSPI NAND load writ/read cache register data

[zoltanhorvath]

Hi,

I try to program a NAND page with FlexSPI with iMXRT1024.
I write the cache register in several parts.
When I write data to cache register FlexSPI doesn't sends column address to the flash. It always send 0 as address and the cache content always changed from 0 location.

My LUT entry is:

 /* Page Program Load */
lookup_table[4 * NAND_CMD_LUT_SEQ_IDX_PROGRAMLOAD] =
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, 0x84, kFLEXSPI_Command_CADDR_SDR, kFLEXSPI_1PAD, 0x10),
lookup_table[4 * NAND_CMD_LUT_SEQ_IDX_PROGRAMLOAD + 1] =
FLEXSPI_LUT_SEQ(kFLEXSPI_Command_WRITE_SDR, kFLEXSPI_1PAD, 0x40, kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0),

The code that executes transfer:

flash_transfer.port = PSP_QSPI_FLEXSPI_PORT;
flash_transfer.SeqNumber = 1;
flash_transfer.deviceAddress = address; // I expect to send this address after command and 4 dummy bits.
flash_transfer.cmdType = kFLEXSPI_Write;
flash_transfer.seqIndex = NAND_CMD_LUT_SEQ_IDX_PROGRAMLOAD;
flash_transfer.data = (uint32_t p_data;
flash_transfer.dataSize = data_size;

status = FLEXSPI_TransferBlocking( FLEXSPI, &flash_transfer );

The same happens when I try to read data from cache register starting from a non-zero page location.

What is the correct LUT entry to do this?

Thanks in adcance!

BR.
Zoltan

[jeremyzhou]

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
I think I need more information prior come to a conclusion, so I was wondering if you can introduce your testing environment, such as custom board, schematic, part No of Nand flash, source code, etc.
Have a great day,
TIC

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[zoltanhorvath]

Hi,

Thanks for your reply/ I am using MIMXRT1024 EVK board with a GD5F2GQ5xE NAND flash connected to FlexSPI port A using GPIO_SD_B1_06 - GPIO_SD_B1_011 pins.
The original functions of these pins are detached from the board.

MCUXpresso IDE is used and the application is built and run from RAM.

BR
Zoltan

[jeremyzhou]

Hi,
Thanks for your reply and clarification.
Firstly, the hardware connection is good, next, I'd like to suggest you use the logic analyzer to capture the wave to check the time sequence whether conform to the command protocol in the datasheet.
Have a great day,
TIC

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[zoltanhorvath]

Hi,

Thanks for your reply. I checked the signal on data line 0 and saw that after command code always 0 is sent out as a column address.

However I tried some different settings in LUT, and if I set kFLEXSPI_Command_RADDR_SDR instead of kFLEXSPI_Command_CADDR_SDR column address will be sent out correctly.

BR
Zoltan

[jeremyzhou]

Hi，
Thanks for your reply.
I’d like to suggest you refer to the 27.6.5 Application on Serial NAND Flash device in the attachment, this content is not contained in the RM of RT1024.
Have a great day,
TIC

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