External Ref clock for PCIE Gen.2

[adiavraham]

Hi,

The are so many topics regarding this issue, but I don't find the answer in any of them.

In IMX6, is the CLK1/CLK2 pins configured as input Ref clock for the PCIE are LVDS compatible or HCSL compatible?

Where can I find the electrical specifications of the input (common mode, dif inut swing,VIH,VIL)?

Thanks,

Adi

[igorpadykov]

Hi Adi

the LVDS interface complies with TIA/EIA 644-A standard. Please check TIA/EIA STANDARD

644-A, Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits" for details. 

Also please look at

https://community.nxp.com/message/421885?commentID=421885#comment-421885 

Best regards
igor
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[adiavraham]

thanks,

Adi