Enabling CoreSight on i.MX 8MM

[kanimozhi_t]

Hi,

    We're using Yocto Zeus and would like to embed CoreSight for hardware assisted tracing. We enable this by integrating opencsd to the perf tool, but the source and sink drivers are missing.

    We verified that the kernel is configured correctly to include the CoreSight modules but the device tree is lacking the hw trace addresses for etm.

    So we request you to provide the etm address for the A53 cores and the related data. It would be helpful if you could share the example Device tree with coresight enabled.

    Another question is that how can we include coresight into the perf tool? As the included perf recipe is missing the coresight package configuration.

Thanks in advance.

[Zhiming_Liu]

Since 8MM shares same cores' design as 8MP, you can take reference of how to define ETM and related coresight nodes on 8MP: arch/arm64/boot/dts/freescale/imx8mp.dtsi. The coresight driver in kernel is create PMU events for perf, so after you enabled coresight driver, perf can see it: https://www.kernel.org/doc/Documentation/trace/coresight.txt

[kanimozhi_t]

Thanks @Zhiming_Liu for your valuable information.

I've added the following lines from im8mp.dtsi (with modified clocks, IMX8MP_CLK_MAIN_AXI -> IMX8MQ_CLK_MAIN_AXI)

etm0: etm@28440000 {
    compatible = "arm,coresight-etm4x", "arm,primecell";
    reg = <0x0 0x28440000 0x0 0x10000>;
    arm,primecell-periphid = <0xbb95d>;
    cpu = <&A53_0>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

        out-ports {
            port {
            etm0_out_port: endpoint {
                remote-endpoint = <&ca_funnel_in_port0>;
            };
        };
    };
};

etm1: etm@28540000 {
    compatible = "arm,coresight-etm4x", "arm,primecell";
    reg = <0x0 0x28540000 0x0 0x10000>;
    arm,primecell-periphid = <0xbb95d>;
    cpu = <&A53_1>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    out-ports {
        port {
            etm1_out_port: endpoint {
                remote-endpoint = <&ca_funnel_in_port1>;
            };
        };
    };
};

etm2: etm@28640000 {
    compatible = "arm,coresight-etm4x", "arm,primecell";
    reg = <0x0 0x28640000 0x0 0x10000>;
    arm,primecell-periphid = <0xbb95d>;
    cpu = <&A53_2>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    out-ports {
        port {
            etm2_out_port: endpoint {
                remote-endpoint = <&ca_funnel_in_port2>;
            };
        };
    };
};

etm3: etm@28740000 {
    compatible = "arm,coresight-etm4x", "arm,primecell";
    reg = <0x0 0x28740000 0x0 0x10000>;
    arm,primecell-periphid = <0xbb95d>;
    cpu = <&A53_3>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    out-ports {
        port {
            etm3_out_port: endpoint {
                remote-endpoint = <&ca_funnel_in_port3>;
            };
        };
    };
};

funnel0: funnel {
        /*
    * non-configurable funnel don't show up on the AMBA
    * bus.  As such no need to add "arm,primecell".
    */
    compatible = "arm,coresight-static-funnel";
    status = "disabled";

    in-ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@0 {
            reg = <0>;
            ca_funnel_in_port0: endpoint {
                remote-endpoint = <&etm0_out_port>;
            };
        };

        port@1 {
            reg = <1>;
            ca_funnel_in_port1: endpoint {
                remote-endpoint = <&etm1_out_port>;
            };
        };

        port@2 {
            reg = <2>;
            ca_funnel_in_port2: endpoint {
                remote-endpoint = <&etm2_out_port>;
            };
        };

        port@3 {
            reg = <3>;
            ca_funnel_in_port3: endpoint {
                remote-endpoint = <&etm3_out_port>;
            };
        };
    };

    out-ports {
        port {
            ca_funnel_out_port0: endpoint {
                remote-endpoint = <&hugo_funnel_in_port0>;
            };
        };
    };

};

funnel1: funnel@28c03000 {
    compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
    reg = <0x0 0x28c03000 0x0 0x1000>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    in-ports {
        #address-cells = <1>;
        #size-cells = <0>;

        port@0 {
            reg = <0>;
            hugo_funnel_in_port0: endpoint {
                remote-endpoint = <&ca_funnel_out_port0>;
            };
        };

        port@1 {
            reg = <1>;
            hugo_funnel_in_port1: endpoint {
                /* M7 input */
            };
        };

        port@2 {
            reg = <2>;
            hugo_funnel_in_port2: endpoint {
                /* DSP input */
            };
        };
        /* the other input ports are not connect to anything */
    };

    out-ports {
        port {
            hugo_funnel_out_port0: endpoint {
                remote-endpoint = <&etf_in_port>;
            };
        };
    };
};

etf@28c04000 {
    compatible = "arm,coresight-tmc", "arm,primecell";
    reg = <0x0 0x28c04000 0x0 0x1000>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    in-ports {
        port {
            etf_in_port: endpoint {
                remote-endpoint = <&hugo_funnel_out_port0>;
            };
        };
    };

    out-ports {
        port {
            etf_out_port: endpoint {
                remote-endpoint = <&etr_in_port>;
            };
        };
    };
};

etr@28c06000 {
    compatible = "arm,coresight-tmc", "arm,primecell";
    reg = <0x0 0x28c06000 0x0 0x1000>;
    clocks = <&clk IMX8MQ_CLK_MAIN_AXI>;
    clock-names = "apb_pclk";
    status = "disabled";

    in-ports {
        port {
            etr_in_port: endpoint {
                remote-endpoint = <&etf_out_port>;
            };
        };
    };
};

However, the /sys/bus/coresight/devices/ are still empty:

root@imx8mq:/# ls -la /sys/bus/coresight/devices/
total 0
drwxr-xr-x 2 root root 0 Jan 13 10:46 .
drwxr-xr-x 4 root root 0 Jan 13 10:46 .. 

But I got the ETM Modules, listed as follows

root@imx8mq:/# find . -name "*etm*"
./usr/bin/setmetamode
./sys/devices/cs_etm
./sys/bus/amba/drivers/coresight-etm4x
./sys/bus/event_source/devices/cs_etm
./sys/firmware/devicetree/base/etm@28740000
./sys/firmware/devicetree/base/etm@28640000
./sys/firmware/devicetree/base/etm@28540000
./sys/firmware/devicetree/base/etm@28440000
./sys/module/coresight_etm4x

So, my questions are:

1. How to make available of the CoreSight sinks and sources?

2. How to check the perf tool for CoreSight integration?

Thanks in advance!

[kanimozhi_t]

To add additional context, I've taken the lines related to CoreSight (EMT, Funnel, etc.,) lines from the "imx8mp.dtsi" file and paste the same in the "imx8mq.dtsi" file.

During this process, I had to change the "IMX8MP_CLK_MAIN_AXI" to "IMX8MQ_CLK_MAIN_AXI" for mitigating the build errors. Apart from this change the build succeeds without any further modifications.

But even after this addition in device tree, the Linux filesystem does not include any of the CoreSight devices.

So, it raises the following questions:

1. Is the address of ETM for i.MX 8MP and i.MX 8MQ same? Eg: for etm1

   reg = <0x0 0x28440000 0x0 0x10000>;

2. What is the purpose of the line status = "disabled" ? Do I need to enable it?
3. Where can I find the ETM addresses for i.MX 8MQ?

[Zhiming_Liu]

Hi

1.The ETM address of i.MX8M series is same.They are the same cpu ip.

2.You must enable it if you wants to use node

BR

Zhiming

[kanimozhi_t]

Even after enabling all the nodes in the above Device Tree fragment above as,

status = "enabled";

the CoreSight devices are empty in the Linux.

Do you have any idea of what would've gone wrong or further debugging steps?

[Zhiming_Liu · Accepted solution]

You should change like:

status = "okay";

[kanimozhi_t]

@Zhiming_Liu Thanks for your swift replies and helping us to get it worked.

[Zhiming_Liu]

I have asked the expert and will update later