EIM write performance / burst size

[PeterBergin]

Hi,

we are connecting an i.MX6DQ with a FPGA through the EIM bus and we need help to find the register settings used to get maximum performance for synchronous write operations on that interface?

We use the bus in 16-bit synchronous multiplexed mode. Our register settings are:

EIM_CS0GCR1 = 0x0191103F
EIM_CS0GCR2 = 0x00001000
EIM_CS0RCR1 = 0x01000000
EIM_CS0RCR2 = 0x00000000
EIM_CS0WCR1 = 0x01000000
EIM_CS0WCR2 = 0x00000000

Because we use the bus in multiplexed mode to get maximum performance the burst length on a write has to be maximized. What settings is needed in order to get the as many data as possible per address in one CS cycle? What can we expect to be the maximum amount of data within a CS cycle?

We can also confirm from measurements that there are long delays between CS cycles that previously has been discussed in https://community.freescale.com/message/428151 and https://community.freescale.com/message/491788. This is the reason to get as long CS cycles as possible to increase performance.

Best regards,

/Peter

[igorpadykov]

Hi Peter

I would suggest to look at attached i.MX53 (it has similar EIM)

examples and try to reuse them for i.MX6. One can use i.MX6 SDK (eim example)

i.MX 6Series Platform SDK  : Bare-metal SDK

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

[kristofferglemb]

Hi Igor,

Thanks for the fast reply! (I'm working with Peter)

We are interested in getting the SDMA to work in Linux copying memory from ARM RAM to EIM. We are currently running on a Nitrogen6 Max board with a 3.10.7 kernel. The imx-sdma driver in Linux is lacking memory to memory transfer capabilities. We found a patch (from Freescale) adding that feature in the following forum thread: i.MX6 SDMA.​ Do you know if this the proper patch to apply or if there are better versions available? If there is an example client driver using the SDMA engine to copy memory to EIM we would very much like to see that.

Best regards

Kristoffer

[igorpadykov]

Hi Kristoffer

yes this is proper patch, I think it is included as

ENGR00308001-sdma-support-M2M-dma-copy-for-v3.10.17.patch

Best regards

igor

[kristofferglemb]

Hi Igor,

I have gotten the SDMA to work copying from memory to EIM. However the speed is quite bad, only 25 MB/s (16-bit EIM width).

I'm using the default ap_2_ap SDMA script. Is it possible to get the source for this script? In the reference manual it is mentioned that you can use prefetch and copy bits in the SDMA STF instruction to increase throughput. I guess the default ap_2_ap script does not use these flags? I would like to modify the firmware, enabling these flags. Can you provide an example?

Best regards,

Kristoffer

[rclongyunteng]

Hi Kristoffer,

I am working to transfer data from EIM to MX6 DDR with SDMA. But it does not work. I think the imx-sdma driver in Linux is lacking transfering data from EIM to MX6 DDR with SDMA.

I see that you have gotten the SDMA to work copying from memory to EIM. So,  Could you give me some suggestions please?

Thank you.

Besr Regards

[igorpadykov]

Hi Kristoffer

unfortunately Freescale does not support

customization of sdma scripts, sources are not available.

Just for reference below link may be useful

http://billauer.co.il/blog/2011/10/imx-sdma-howto-memory-map/

Best regards

igor