i.MX6 SDMA

[dvona]

Greetings,

I have a few questions for the Linux BSP developers.  My customer has a working implementation of the IMX6 SDMA unit doing a memory to memory transfer on the 3.0.35 Linux BSP.  This implementation is based on the Linux dmaengine interface.  It is utilizing two scatter gather lists as described in the ims-sdma.c source (see comment).  Moving forward to the 3.10.9 and 3.10.17-r0 that support has changed and appears to have been removed.
Here is a comment from the imx-sdma.c BSP 3.0.35 source.
    /*
     * For SDMA M2M use, we need 2 scatterlists, the src addresses are
     * stored in the first sg, and the dst addresses are stored in the
     * second sg. In the former code, when the first sg entered 'sdma_
     * prep_slave_sg', 'sdmac->status' would be set to 'DMA_IN_PROGRESS',
     * and the second sg would return 'NULL' when entered 'sdma_prep_slave
     * _sg'. To avoid this error, in the code, we check if for M2M use,
     * the second sg will not return 'NULL' when enters 'sdma_prep_slave
     * _sg'.
     */
Can you answer the following questions or put me in touch with a BSP developer who can?
Does the Linux BSP 3.10.17-r0 support IMX6 SDMA memory to memory transfers through the Linux dmaengine interface? If so, can I get details on how to use the dmaengine interface for memory to memory transfers as this seems to have changed from 3.0.35? If not, is there a reason it was removed or a plan to fix?

[rajasekarank]

Igor,

Any comments or help...

[rajasekarank]

Thanks everyone.

Hello igor,

1. I have downloaded the linux-imx6-boundary-imx_4.1.15_1.0.0_ga and imx-test-3.10.17-1.0.0.tar.gz.

2. Able to built the Linux kernel by following below commands.

export ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- LOADADDR=10008000

make nitrogen6x_defconfig

make zImage modules dtbs

3. Trying to build the example provided in the imx-test-3.10.17-1.0.0.tar.gz throws lot of errors and warnings.

Below is the steps followed,

a. Make the kbuild directory under the linux directory(mkdir kbuild/mxc27530evb)

b. Build the example with required variables.

make PLATFORM=MXC27530EVB LINUXPATH=/home/raja/work/av/linux-imx6-boundary-imx_4.1.15_1.0.0_ga KBUILD_OUTPUT=/home/raja/work/av/linux-imx6-boundary-imx_4.1.15_1.0.0_ga/kbuild/mxc27530evb CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf-

PS: Please find the attached error log for your review and have used Linaro toolchain. I have followed above steps with Linux version linux-imx6-boundary-imx_3.0.35_4.1.0 however the result is same.

Please point me out my fault or missed procedure to build and run the examples. Thank you very much in advance.

Regards,

Raja

[leige-b42127]

Hi, this patch is pushed by me when i was still in linux BSP team, now i am in AE team. I have a pach for 3.5.7 'use the dmaengine interface for memory to memory transfers' using device_prep_dma_sg (it works, but not pushed, so as to 3.10.17), the patch is attached to this message, you can use it as a refer(.patch file is the kernel patch for imx-sdma.c, .c file is the test code). The speed of M2M transfer is about 50M/s

  4 Subject: [PATCH 3/3] ENGR : Add sdma memory to memory copy function for

  5  kerenl 3.5.7

  6

  7 In this patch, we use a new API from dmaengine: device_prep_dma_sg, which

  8 is designed for memory to memory copy. The use is the same to

  9 'device_prep_slave_sg', except that we use:

10        for (i = 0, sg = src_sg, sg2 = dst_sg; i < src_nents;

11                        i++, sg = sg_next(sg), sg2 = sg_next(sg2))

12 instead of using:

13        for_each_sg(sgl, src_sg, sg_len, i).

14

15 Signed-off-by: Ge Lei <b42127@freescale.com>

[marcomadrigal]

Hi Lei Ge,

I am working with the SDMA on the iMX6 to do M2M copies. I am wondering where the 50M/s rate come from? Is this a hardware limitation? I am getting similar transfer rate on my application.

It is not common for a DMA engine to take too long in a transfer, the same transfer on the iMX6 (which is taking around 30ms) usually takes 2ms in other hardware.

Is there a way to improve the DMA transfer performance?

Regards,

Marco

[igorpadykov]

Hi Marco

50-60MB/s is typical sdma performance measured on other processors too,

for m2m copy example one can also look at mxc_sdma_memcopy_test.c

http://repository.timesys.com/buildsources/i/imx-test/imx-test-3.10.17-1.0.0/imx-test-3.10.17-1.0.0....

Best regards

igor

[leige-b42127]

I am not sure. I am confused too. I tested the 50M rate by transfering some data and measuring the time(data/time). In fact, we have no really M2M copy use of SDMA in our solution(just a test code).

[kenmaier]

Ge Lei and Dan Vona,

Thanks for the patch and test code.  I have updated the BSP 3.10.9 SDMA driver and have a working memory to memory SDMA test.  This seems like a very standard use of the SDMA and should be maintained in the iMX BSP code base.  Are there any plans to add this back into the main code base?  Is there a reason this is not being maintained in the main BSP code base?  We are working with the BSP beta release and plan to move to the release when available.  If this is not added to the main BSP code base, we will have to maintain this as the iMX BSP moves toward a release.

Thanks,

Ken Maier

[leige-b42127]

Maybe the BSP team forgot to add this patch, i am trying to inform the SDMA owner in BSP team.

[kenmaier]

Thanks Lei Ge!!  Have you heard anything back from the BSP team?

Could someone from the BSP team respond to this thread,  Is this patch going to be applied to the main code base?

Thanks,

Ken Maier

[leige-b42127]

huang shijie b32955, and gong yibing b38343 are the owner of SDMA now. you can check with them, i just checked with them, they are now busy with other issues now,  maybe don't have enough time to do this.