Does imx93 support WDQS?

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Does imx93 support WDQS?

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takayuki_ishii
Contributor V

Hello community,

 

I have one question about i.MX93 DDR PHY function.

Does i.MX93 support WDQS?

 

In following thread, it say that i.MX8M Plus support WDQS when WDQSEXTENSION is enabled.

https://community.nxp.com/t5/i-MX-Processors/Is-IMX8M-Plus-using-WDQS/m-p/1877743

 

But, it have no WDQSEXTENSION bit in i.MX93.

Does it have another method to "write and masked write operation DQS control"?

 

Best regards,

Ishii.

 

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pengyong_zhang
NXP Employee
NXP Employee

HI, @takayuki_ishii 

i.MX93 support WDQS feature.

B.R

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bernhardfink
NXP Employee
NXP Employee

We don't document the registers of the DDRC PHY, but for this specific feature (in fact this is a requirement of JESD209-4B) you find at least an indication that it is enabled:

bernhardfink_0-1726227597651.pngbernhardfink_0-1726227597651.png

In the lpddr4x_timing.c file you can't identify this bit without having a detailed description of the registers, but as Pengyong wrote, it is enabled by default.

Regards,
Bernhard.

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pengyong_zhang
NXP Employee
NXP Employee

HI, @takayuki_ishii 

i.MX93 support WDQS feature.

B.R

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