Hello community,
I have one question about i.MX93 DDR PHY function.
Does i.MX93 support WDQS?
In following thread, it say that i.MX8M Plus support WDQS when WDQSEXTENSION is enabled.
https://community.nxp.com/t5/i-MX-Processors/Is-IMX8M-Plus-using-WDQS/m-p/1877743
But, it have no WDQSEXTENSION bit in i.MX93.
Does it have another method to "write and masked write operation DQS control"?
Best regards,
Ishii.
Solved! Go to Solution.
We don't document the registers of the DDRC PHY, but for this specific feature (in fact this is a requirement of JESD209-4B) you find at least an indication that it is enabled:
In the lpddr4x_timing.c file you can't identify this bit without having a detailed description of the registers, but as Pengyong wrote, it is enabled by default.
Regards,
Bernhard.