Hi everyone,
I had some technical questions about how the display system gets defined using the device tree. I have a parallel interface LCD available through /dev/fb0. I'm trying to figure out where fb0 comes from in the device tree so I can adjust timings and so on with a display-timings block.
So, in imx6q.dtsi there's this code:
imx6q.dtsi |
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ipu2_di1: port@3 { #address-cells = <1>; #size-cells = <0>; reg = <3>; ipu2_di1_hdmi: endpoint@1 { remote-endpoint = <&hdmi_mux_3>; }; ipu2_di1_mipi: endpoint@2 { }; ipu2_di1_lvds0: endpoint@3 { remote-endpoint = <&lvds0_mux_3>; }; ipu2_di1_lvds1: endpoint@4 { remote-endpoint = <&lvds1_mux_3>; }; }; }; }; display-subsystem { compatible = "fsl,imx-display-subsystem"; ports = <&ipu1_di0>, <&ipu1_di1>, <&ipu2_di0>, <&ipu2_di1>; }; |
ipu1 is defined in imx6qdl.dtsi. The display-subsystem section is of particular interest to me. When I run dmesg get this:
debian@arm:~$ sudo dmesg | grep fb0 [ 3.888801] imx-drm display-subsystem: fb0: frame buffer device
The complete set of messages is this:
[ 3.758204] imx-ipuv3 2400000.ipu: IPUv3H probed [ 3.764282] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). [ 3.770951] [drm] No driver support for vblank timestamp query. [ 3.777006] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops) [ 3.784480] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops) [ 3.791986] imx-drm display-subsystem: bound imx-ipuv3-crtc.4 (ops ipu_crtc_ops) [ 3.799492] imx-drm display-subsystem: bound imx-ipuv3-crtc.5 (ops ipu_crtc_ops) [ 3.807121] dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1 [ 3.814641] [drm] forcing HDMI-A-1 connector ON [ 3.819228] imx-drm display-subsystem: bound 120000.hdmi (ops dw_hdmi_imx_ops) [ 3.877144] Console: switching to colour frame buffer device 128x48 [ 3.888801] imx-drm display-subsystem: fb0: frame buffer device [ 3.894835] imx-drm display-subsystem: registered panic notifier [ 3.954779] [drm] Initialized imx-drm 1.0.0 20120507 on minor 0 [ 3.961116] imx-ipuv3 2800000.ipu: IPUv3H probed
So, I'm wondering where does /dev/fb0 come from in the device tree using the default configuration? There's no fb statement like what's shown here as an example. I need to adjust the clock polarity and other timing stuff for the display. How can I go about doing that properly?
Thanks!
Hi Ashwin
seems in default configuration fb number is configured during
registering in mxcfb_probe() function, please check
mxc_dispdrv.c,mxc_lcdif.c,mxc_ipuv3_fb.c and Table 6-1. IPU Driver Files
in attached Linux Manual.
Best regards
igor
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Looks helpful. I'll read through it. I discovered that the location of the status="okay"; statement matters, and now with that statement under the configuration for that node I get the following out of dmesg:
[ 3.776730] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops) [ 3.784208] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops) [ 3.791721] imx-drm display-subsystem: bound imx-ipuv3-crtc.4 (ops ipu_crtc_ops) [ 3.799226] imx-drm display-subsystem: bound imx-ipuv3-crtc.5 (ops ipu_crtc_ops) [ 3.806843] dwhdmi-imx 120000.hdmi: Detected HDMI controller 0x13:0xa:0xa0:0xc1 [ 3.814351] [drm] forcing HDMI-A-1 connector ON [ 3.818937] imx-drm display-subsystem: bound 120000.hdmi (ops dw_hdmi_imx_ops) [ 3.826355] imx-ldb 2000000.aips-bus:ldb@020e0008: could not determine data mapping: -22 [ 3.834470] imx-drm display-subsystem: failed to bind 2000000.aips-bus:ldb@020e0008 (ops imx_ldb_ops): -22 [ 3.844925] imx-drm display-subsystem: master bind failed: -22 [ 3.850787] imx-ipuv3-crtc: probe of imx-ipuv3-crtc.5 failed with error -22 [ 3.858174] imx-ipuv3 2800000.ipu: IPUv3H probed
Which is an improvement I guess, it's at least trying to do something. I haven't found a translation for error -22 yet though. The LDB declaration I'm making on top of the default code is:
&ldb {
interface_pix_fmt = "IPU_PIX_FMT_RGB666";
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
<&clks IMX6QDL_CLK_LDB_DI0>, <&clks IMX6QDL_CLK_LDB_DI1>,
<&clks IMX6QDL_CLK_LDB_DI0_DIV_3_5>, <&clks IMX6QDL_CLK_LDB_DI1_DIV_3_5>,
<&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
clock-names = "di0_pll", "di1_pll",
"di0_sel", "di1_sel",
"di2_sel", "di3_sel",
"di0", "di1",
"ldb_di0_div_3_5", "ldb_di1_div_3_5",
"ldb_di0_sel","ldb_di1_sel";
status = "okay";
lvds-channel@0 {
crtc = "ipu1-di1";
interface_pix_fmt = "RGB666";
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing {
clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <0x5a>;
hfront-porch = <0x78>;
vback-porch = <0x1>;
vfront-porch = <0x1>;
hsync-len = <0x64>;
vsync-len = <0x21>;
//linux,phandle = <0x14>;
//phandle = &timing0;
pixelclk-active = "active high";
};
};
};
};
Are you able to tell me more about what that error means? Thanks!