Debugging in FRDM i.MX 93 using J-Link

[Shanmugapriya]

Dear Team,

Greetings!

I want to run and debug an example code - "Hello world" in FRDM i.MX 93 Development board. I am using VS Code with the MCUXpresso extension. I am using a SEGGER J-Link probe with the SWD interface (SW_CLK, DIO and GND) and have modified the boot switches (1010) accordingly.

I am providing 3.3 V from P11 extension pins to the J-Link probe for Vref. 

The connected device is correctly detected in both the Device Manager and VS Code.

However, when I attempt to start a debug session, it results in an error. I also verified the setup using Command Prompt, where I encountered the following error message: “DAP: Could not power-up system power domain.”

We kindly request your support in helping us move forward with resolving this issue. Please let me know if you require any additional details from our side.

I have attached reference screenshots.

Thanks in advance.

[pengyong_zhang]

Hi @Shanmugapriya 

Sorry, my mistake, i have contact it with my colleague, you need to connect it. And the voltage is 1.8V

B.R

[Shanmugapriya]

Hi,

No problem—I was able to identify the pin that needs to be connected for Vref = 1.8 V after reviewing the schematic along with the board.

In the community post, it was mentioned that resistors R3017 and R3018 should be removed. I can find them in the schematic, but I’m unable to locate them on the FRDM board itself.

[pengyong_zhang]

Hi @Shanmugapriya 

You can refer the attachment file find the location of  R3017 and R3018

B.R

[Shanmugapriya]

I have located the resistor on the board.

Now that I have removed R3017/R3018 and disconnected UART5 from the SoC, what happens to the Wi‑Fi module? What features will stop working?

[pengyong_zhang · Accepted solution]

Hi @Shanmugapriya 

I am not familiar about wifi module, you can create another ticket talk about it. Thanks for your understanding.

B.R

[pengyong_zhang]

Hi @Shanmugapriya 

Does not need the Vref pin. Only SWCLK and SWDIO is fine.

B.R

[Shanmugapriya]

Could you please check this https://community.nxp.com/t5/FRDM-Training-Hub/How-to-use-J-link-on-FRDM-IMX93/ta-p/2122902

If Vref is not required, this community post link misleads

[pengyong_zhang]

hI @Shanmugapriya 

i.MX93 FRDM board use Serial wire debug (SWD) mode. please use SWD mode run the M core debug.

SWCLK-> SWCLK Jlink

SWDIO-> SWDIO Jlink

GND  -> GND Jlink

B.R

[Shanmugapriya]

I connected the wiring using the same configuration and performed the M‑core debugging, but I still encountered the error:  "DAP: Could not power-up system power domain."

First, is Vref required in this setup?
If it is required, what voltage should be supplied to the Vref pin?

[pengyong_zhang]

Hi @Shanmugapriya 

You can debug the m-core of the imx93 according to the process in the attachment file.

Please take a full board connection picture. Include your board J-Link PC

B.R

[Shanmugapriya]

With reference to the provided manual, I have successfully imported the SDK and built the sample project. However, I am currently facing an issue at the debug and run stage. The reference image in the manual illustrating the debug probe connection is for a different board and does not match the FRDM i.MX 93 hardware.

Additionally, the FRDM i.MX 93 board does not include a standard 10-pin debug connector; instead, it exposes only three SWD pins. Because of this, I am unable to proceed with debugging as described in the manual. I have attached images showing the board connections to the Segger J-Link for reference.

I would like to clarify whether the Vref for the SWD interface on this board is 3.3 V or 1.8 V.