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ko-hey
Senior Contributor II

Hi all

According to the table 1 of AN5170, it shows voltage levels in some case of ARM freq.

For example, VDDARM is 0.925V when frequency is 198MHz.

Also according to the table 2 of AN4715, it shows voltage levels in some case of ARM freq, too.

For example, VDDARM is 0.95V when frequency is 396MHz.

I have a question about those .

Which drivers control those VDDARM's voltage ?

Ko-hey

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BiyongSUN
NXP Employee
NXP Employee

imx6q.dtsi

22                 #size-cells = <0>;

23

24                 cpu0: cpu@0 {

25                         compatible = "arm,cortex-a9";

26                         device_type = "cpu";

27                         reg = <0>;

28                         next-level-cache = <&L2>;

29                         operating-points = <

30                                 /* kHz    uV */

31                                 1200000 1275000

32                                 996000  1250000

33                                 852000  1250000

34                                 792000  1175000

35                                 396000  975000

36                         >;

37                         fsl,soc-operating-points = <

38                                 /* ARM kHz  SOC-PU uV */

39                                 1200000 1275000

40                                 996000  1250000

41                                 852000  1250000

42                                 792000  1175000

43                                 396000  1175000

44                         >;

"~/imx_builder/rel_imx_3.14.52_1.1.0_ga/kernel_imx/arch/arm/boot/dts/imx6q.dtsi" 267L,

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BiyongSUN
NXP Employee
NXP Employee

In the each one of the BSP release, contains a document  i.MX_6_Linux_Reference_Manual.pdf.

Untitled.png

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ko-hey
Senior Contributor II

Hi BiyongSUN

Sorry for late reply.

I checked some source that is shown in i.MX_6_Linux_Reference_Manual.pdf.

However, I can't find a value of voltage setting.

Could you tell me that which source file is included about it ?

Ko-hey

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BiyongSUN
NXP Employee
NXP Employee

imx6q.dtsi

22                 #size-cells = <0>;

23

24                 cpu0: cpu@0 {

25                         compatible = "arm,cortex-a9";

26                         device_type = "cpu";

27                         reg = <0>;

28                         next-level-cache = <&L2>;

29                         operating-points = <

30                                 /* kHz    uV */

31                                 1200000 1275000

32                                 996000  1250000

33                                 852000  1250000

34                                 792000  1175000

35                                 396000  975000

36                         >;

37                         fsl,soc-operating-points = <

38                                 /* ARM kHz  SOC-PU uV */

39                                 1200000 1275000

40                                 996000  1250000

41                                 852000  1250000

42                                 792000  1175000

43                                 396000  1175000

44                         >;

"~/imx_builder/rel_imx_3.14.52_1.1.0_ga/kernel_imx/arch/arm/boot/dts/imx6q.dtsi" 267L,

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ko-hey
Senior Contributor II

Hi Biyong Sun

I checked it and found in other kernel version.

L3.14.28     /tmp/work/cortexa9hf-vfp-neon-poky-linux-gnueabi/linux-libc-headers/3.14-r0/linux-3.14/arch/arm/boot/dts

L3.14.38     /build-6ul-x11/tmp/work-shared/imx6qsabresd/kernel-source/arch/arm/boot/dts

Thank you for your cooperation.

Ko-hey

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