DRAM_SDCLK_0 and DRAM_SDCLK_1

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DRAM_SDCLK_0 and DRAM_SDCLK_1

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dqz
Contributor II

about imx6 DDR3 design,there is no need to connect DRAM_SDCLK_0 and DRAM_SDCLK_1 with CK of DDR3?

iMX6 SabreSD board do not use  DRAM_SDCLK_0 and DRAM_SDCLK_1 ,but some other board use them ,i want to know what is the effect of DRAM_SDCLK_0 and DRAM_SDCLK_1? thanks

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jan_spurek
NXP Employee
NXP Employee

Hello Dq,

these pads serve as clock access points. By default the 0R resistors are not mounted and their pads are bridged by

scratching planes.

mnt.png

Best Regards,

Jan

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jan_spurek
NXP Employee
NXP Employee

Helo Dq,

clock always has to be provided to the DDR3 device. i.MX6 SabreSD uses DRAM_SDCLK_0 and DRAM_SDCLK_1. Could you please share the schematic from which you determined that those clocks are not used?

Best Regards,

Jan

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dqz
Contributor II

捕获.PNG

ssss.jpg

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168 Views
jan_spurek
NXP Employee
NXP Employee

Hello Dq,

these pads serve as clock access points. By default the 0R resistors are not mounted and their pads are bridged by

scratching planes.

mnt.png

Best Regards,

Jan

View solution in original post