Hi,
Design platform: i.MX6 DL 1GHz
RAM: LPDDR2 1GB, 2 chip in 1 die, @396Hz
When i tried to run the Stress test v2.20
and no matter i ran at 352MHz, 396MHz, and 413MHz,
after several tens loops (it can pass stress test, but it will also fail), failure occurs at all these frequency with same errors report
DDR Freq: 413 MHz
t0.1: data is addr test
t0: memcpy11 SSN test
t1: memcpy8 SSN test
t2: byte-wise SSN test
t3: memcpy11 random pattern test
test3 Address: 0x2400c944
Data read was: 0x358bf292
But pattern was: 0x258bf292
Bit location: 0x10000000
Error: failed to run stress test!!!
DDR Stress Test Iteration 34
Current Tempareture: 64
============================================
DDR Freq: 352 MHz
t0.1: data is addr test
t0: memcpy11 SSN test
t1: memcpy8 SSN test
t2: byte-wise SSN test
t3: memcpy11 random pattern test
test3 Address: 0x2400c944
Data read was: 0x358bf292
But pattern was: 0x258bf292
Bit location: 0x10000000
Error: failed to run stress test!!!
DDR Stress Test Iteration 36
Current Tempareture: 64
============================================
DDR Freq: 396 MHz
t0.1: data is addr test
t0: memcpy11 SSN test
t1: memcpy8 SSN test
t2: byte-wise SSN test
t3: memcpy11 random pattern test
test3 Address: 0x2400c944
Data read was: 0x358bf292
But pattern was: 0x258bf292
Bit location: 0x10000000
Error: failed to run stress test!!!
So, the failure always occurs at
t3: memcpy11 random pattern test
test3 Address: 0x2400c944
Data read was: 0x358bf292
But pattern was: 0x258bf292
Bit location: 0x10000000
Can anyone have an idea what has gone wrong?
i can see bit location 0x10000000 got a problem, is it something related to chip 0 and chip 1 selection or switching ?
I attached one of the stress test log and the inc we used.
Best regards,
Bill
Original Attachment has been moved to: ddr_stresstest_20151002-11'4'32.log.zip
Original Attachment has been moved to: lpddr2.inc.zip
