Configuring GPIO input with pull-down on i.mx6ul

[magyarm]

Hi All,

I am using a Hobbitboard baseboard with a IMX6UL-PICO-EMMC (processor MCIMX6GxxVM) module. I am trying to set GPIO4_IO20 as input with the 100K pull-down enabled. I am using the morty branch of Meta-Freescale, Kernel 4.9, and the TechNexion device tree here https://github.com/Freescale/linux-fslc/blob/4.9.x%2Bfslc/arch/arm/boot/dts/imx6ul-pico-hobbit.dts. as my base device tree.

Currently, every Device Tree value results in the pin as an input but pulled high when checked with a multimeter and in the file system. Checking the schematic, there is no pull-up resistor, so I believe this to be the action of an internal pull-up, but the register values look correct.

I am checking using cat /sys/kernel/debug/gpio and checking for the gpio-116 entry.

:~# cat /sys/kernel/debug/gpio
...
gpiochip3: GPIOs 96-127, parent: platform/20a8000.gpio, 20a8000.gpio:
gpio-116 (                    |gpio_420_in         ) in  hi
...

Checking the register using memory map, it also looks to have the correspoding value I had set in the device tree. ( script from here: https://github.com/kylemanna/pydevmem/blob/master/devmem.py )
:~# python devmem.py -r 0x020E046C -n 0x1
0x20e046c:   0001b0b1

Below is the device tree fragment I am using.

&gpio4 {
    gpio_420_input {
        gpio-hog;
        gpios = <20 GPIO_ACTIVE_HIGH>;
        input;
        line-name = "gpio_420_in";
    };
};

&uart2 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpio_420_input &pinctrl_uart_2_rx>;
    status = "okay";
};

&iomuxc {
    pinctrl_gpio_420_input: gpio420inputgrp {
        fsl,pins = <
            MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b1
        >;
    };
    pinctrl_uart_2_rx: uart2rxgrp {
        fsl,pins = <
            MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x0
        >;
    };
};

Can someone please advise what is wrong with this approach? Or how to enable the pin pull-down on the i.mx6ul platform?

Thank you for any replies.

#imx6ul gpio‌ #pulldown‌

[caglarabidin]

Hi @Michael

Did you solve the problem ? I have a same problem on TEP0700-imx6ul Technexion panel board. There are limited numbers of gpios available on the board. I have to find a way to configure these pins as input with pull-down option.

I modified pad register of gpios in device tree. The  configurations are below.

pinctrl_external_gpio: extgpiogrp {
            fsl,pins = <

                             MX6UL_PAD_JTAG_TDI__GPIO1_IO13          0x03079
                             MX6UL_PAD_JTAG_TDO__GPIO1_IO12        0x03079
                             MX6UL_PAD_GPIO1_IO09__GPIO1_IO09     0x03079            

                             MX6UL_PAD_GPIO1_IO05__GPIO1_IO05     0x03079

            >;

};

[magyarm]

After a bit more experimenting, we found that using a pin 1 on JP2 of the PICO-IMX6UL-KIT works as expected as an input. After trying a few other pins on JP5 we still found that the input would be pulled high. Attached is the Device Tree fragment setting JP2 pin 1 ( CPU Pad LCD_DATA0, Signal LCDIF_DATA0 ) as GPIO3 IO05 for anyone who might come across this post.

&gpio3 {
    gpio_305_input {
        gpio-hog;
        gpios = <05 GPIO_ACTIVE_HIGH>;
        input;
        line-name = "gpio_305_in";
    };
};

&uart2 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_gpio_inputs &pinctrl_uart_2_rx>;
    status = "okay";
};

#define GPIO_INPUT_SETTINGS 0x3000

&iomuxc {
    pinctrl_gpio_inputs: gpioinputsgrp {
        fsl,pins = <
            MX6UL_PAD_LCD_DATA00__GPIO3_IO05  GPIO_INPUT_SETTINGS
        >;
    };
    pinctrl_uart_2_rx: uart2rxgrp {
        fsl,pins = <
            MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x0
        >;
    };
};

[igorpadykov]

one can attach jtag (or printf) iomux pad settings to check

if configuration is correct.

Best regards
igor

[magyarm]

igorpadykov‌ Thank you for the reply. 

Looking at the options in sect 30.5.279 we have tried a few values that should result in the pin being pulled down, but still with the same (pulled high) result. 

For example, setting MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 to 0x3000 in the Device Tree and via memory map access still has the pin being pulled high when read from the file system. I think this should be the simplest case to enable the pull down. Are there any other settings that I need to adjust to enable the pull down correctly?

I could be thinking about this the wrong way. My end goal is to connect a device to this line that signals "ready" by pulling the GPIO line high. Eventually I will want this to trigger an interrupt on the imx6ul, but my first step was to just read the GPIO value, with having it default to low.

My colleague ymeny‌ might be able to provide additional details.

[igorpadykov · Accepted solution]

Hi Michael

pad settings are configured in "MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b0b1"

so one can change them using sect.30.5.279 SW_PAD_CTL_PAD_CSI_HSYNC SW PAD Control
Register (IOMUXC_SW_PAD_CTL_PAD_CSI_HSYNC) i.MX6UL Reference Manual
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

Best regards
igor
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