Configuring CCM_CLKO1 as generic clock with 3.10.x kernel

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Configuring CCM_CLKO1 as generic clock with 3.10.x kernel

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pieropezzin
Contributor I

Hello everyone,

on a custom i.MX6-based board I'm trying to configure the CCM_CLKO1 signal as a generic clock source for an audio codec connected to the SSI interface. I have modified the device tree setting the pinmux as reported below:

&i2c2 {

        codec: tlv320aic3x@18 {

        compatible = "ti,tlv320aic3x";

        reg = <0x18>;

        clocks = <&clks 169>;

        AVDD-supply = <&reg_3p3v>;

        IOVDD-supply = <&reg_3p3v>;

        DRVDD-supply = <&reg_3p3v>;

        DVDD-supply = <&reg_1p8v>;

        status = "okay";

    };

};

&iomuxc {

        tlv320aic3x {

        pinctrl_tlv320aic3x_1: tlv320aic3x_codecgrp-1{

            fsl,pins = <

                MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0

                MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0

                MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0

                MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0

                MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0

            >;

        };

    };

};

&ssi1 {

    status = "okay";

};

&audmux {

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_tlv320aic3x_1>;

    status = "okay";

};

In the "codec" device tree entry, I've added the

clocks = <&clks 169>;

property, which in my understanding should select the cko1 signal as the master clock.

Unfortunately, I don't see any activity on the CSI0_MCLK/CCM_CLKO1 pin. I've checked the device tree hierarchy to make sure that no other peripherals are using that pin. I've also tried adding the following code to the arch/arm/mach-imx/clk-imx6q.c file

printk("Trying to set CLKO1...\n");

    ret = clk_set_parent(clk[cko1_sel], clk[pll4_audio_div]);

    if (!ret){

ret = clk_set_parent(clk[cko], clk[cko1]);
printk("CLKO1 set parent\n");

    }

    if (ret)

pr_warn("failed to set up CLKO1: %d\n", ret);

in the same way that cko2 is configured, but still with no luck and I'm wondering how I'm doing wrong..

Could someone help me understand which are the required steps to correctly configure the CCM_CLKO1 signal?

Any help will be greatly appreciated.

Thanks and best regards

Piero Pezzin

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alejandrolozan1
NXP Employee
NXP Employee

Hi,

On which part are you selecting the clock option made in the CCM_CCOSR register?

pastedImage_0.png

Best Regards,

Alejandro

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alejandrolozan1
NXP Employee
NXP Employee

Sorry, I just realized you have the code in the clk-imx6q.c.

Can you double check the contents of the registers? You can use the unit_tests for such task, memtool or the dump-clocks.sh utility may be helpful.

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pieropezzin
Contributor I

Hello,

ok, I'll try checking the registers as soon as I have some time to work on it. However, are you suggesting that configuring the device tree and adding that code in clk-imx6q.c is not enough, and there is something missing somewhere? Or are there errors in my code?

Thanks for your help and best regards.

Piero Pezzin

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femyvarghese
Contributor I

Have you figure out the reason? I am having the same issue.

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alejandrolozan1
NXP Employee
NXP Employee

Hi,

I am suggesting that there might be something missing and looking at the regsiter contents may be helpful to narrow down the problem.

Best Regards,

Alejandro

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