Communication between Cortex-A53 and Cortex-M4 using Messaging Unit(MU)

[Bhargava]

Hi,

I have a requirement to setup inter-processor communication between A53 and M4 using Messaging Unit. I know there is RPMsg available but the requirement demands IPC realization directly on MU.

Is it possible to realize IPC directly on MU?

And if yes, please share the procedure and test application for the same.

The SoC I am working on is IMX8M MINI and Yocto Dunfell.

Regards,

Bhargava

[yfliu]

Maybe this can help you:

https://github.com/nxp-imx-support/imx-mu/tree/master

Regards,

yf

[StarryKnight04]

Seamless communication between Cortex-A53 and Cortex-M4 is essential for efficient embedded system operation. NXP’s Messaging Unit (MU) and the RPMsg protocol enable reliable data exchange and coordination between these heterogeneous cores. Proper implementation ensures smooth inter-processor messaging for real-time applications.

[Vince100]

Bump!

I know it's 4 years later, but still, bump.

I'm on a i.MX8MP, so I have a M7 in baremetal and the 4x A53 cores running Linux. In the baremetal I can use:

MU_Init(MUB);

NVIC_SetPriority(MU1_M7_IRQn, APP_MU_IRQ_PRIORITY);

NVIC_EnableIRQ(MU1_M7_IRQn);

MU_SendMessage(MUB, regIndex, msg);

MU_ReceiveMsg(MUB, 0, &msg)

In Linux, I got nothing. I understand I could run the A53 cores in baremetal too and then the send/receive messages would work, but is there something in Linux? Even the VPU application notes (RM00294) refers to the Linux Reference Manual (RM00293), which contains nothing useful. My understanding is that one could simply call request_irq() with the right irq number (88 in my case) and a handler. But <linux/interrupt.h> doesn't exists.

Anything happened in there in the last couple years?

[shivumatha]

Hello,

I needed one information. Do you have mcmgr in your SDK which you downloaded from NXP site?

[b36401]

Please note that inter process_communication depends on the software. I mean the OS.
So you need to reference to Linux in point of inter process_communication.

[Bhargava]

Hi,

Could the issue be addressed please?

Regards,

Bhargava

[Bhargava]

Hi,

Thanks for replying.

Actually I am referring to Asymmetric Multiprocessing between Cortex-A53 and Cortex-M4.

Instead of using RPMsg (Remote Processor Messaging) for the same, is there a possibility to realize inter-processor communication directly on Messaging Unit(MU)?

Are these APIs [sc_ipc_open() , sc_ipc_read(), sc_ipc_write(), sc_ipc_close()] available in the linux mainline, Because I could not find any of them in the entire kernel source.

Please provide information about how those APIs can be used along with an user space application(if any).

Regards,

Bhargava