Camera porting guide for MIPI-CSI2 on i.MX8M?

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Camera porting guide for MIPI-CSI2 on i.MX8M?

5,875 Views
michaeltang
Contributor II

Hi, I'm using a i.MX8M EVK to port a driver for my camera over MIPI CSI2. I wondered if there's a porting guide or application note about the camera interface, because the closest document I found is IMXBSPPG (Rev. L4.9.51_imx8mq-ga 03/2018), and it is talking about how to port a camera to i.MX6 series processor. Although they had a few common settings but it is very confused in blur area. So I'm trying to study the source code with reference manual 'IMX8MDQLQRM' but some of the IP/register wasn't describing clearly in source code and reference manual.

I had already created a I2C camera driver and could start the stream at camera side (camera is output data through MIPI interface, measured by oscilloscope), but there's no image been captured in system, so I need to find out what's the issue in my video pipeline.

There're some difference between OV5640 and my camera, like pixel format, pixel length, MIPI speed and frame rate. I'm trying to change the MIPI clock in 
fsl-imx8mq.dtsi:

mipi_csi_1: mipi_csi1@30a70000 {
   compatible = "fsl,mxc-mipi-csi2_yav";
   reg = <0x0 0x30a70000 0x0 0x1000>; /* MIPI CSI1 Controller base addr */
   interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
   clocks = <&clk IMX8MQ_CLK_DUMMY>,
   <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
   <&clk IMX8MQ_CLK_CSI1_ESC_DIV>,
   <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>;
   clock-names = "clk_apb", "clk_core", "clk_esc", "clk_pxl";
   assigned-clocks = <&clk IMX8MQ_CLK_CSI1_CORE_DIV>,
   <&clk IMX8MQ_CLK_CSI1_PHY_REF_DIV>,
   <&clk IMX8MQ_CLK_CSI1_ESC_DIV>;
   // assigned-clock-rates = <133000000>, <100000000>, <66000000>;
   assigned-clock-rates = <266666666>, <800000000>, <400000000>;
      ...
};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

The target MIPI clock is 800MHz, I'm not quite sure the requirement between clk_core, clk_phy and clk_esc, is there anything else to be considered or modified in source code, like mipi_csi2_yav.c?

And I saw an article are talking about the pixel format, we need to extend the mx6s_capture.c for suiting our sensor, is there any document? It's not very easy to match the register with reference manual.

8 Replies

1,828 Views
paul_soucy
Contributor I

I am having the same problem and stuck at the same point. Documentation about the relationship between these clocks would be very helpful.

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1,828 Views
venkatesh_selva
Contributor II

Max supported clock configuration on iMX8 side is 

assigned-clock-rates = <266000000>, <333000000>, <66000000>;

clock speed on the camera side to be <266MHz.

1,828 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Michael

may be useful to check

i.MX8M EVK MIPI CSI Camera Frame Rate 

and linux drivers description included in documentation on

i.MX Software|NXP 

unfortunately I am not aware of other documents on that subject.

Best regards
igor
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michaeltang
Contributor II

I understand your point, although this is a production processor but it's very new for completing the documents.

Do you have instructions for developing the camera on this platform? Otherwise the problems will be post separately and cost a lot of time to finish this, thanks.

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1,828 Views
joachimjaehn
Contributor III

Hey Michael, Hello igorpadykov

could you solve your problems? We are exactly at the same point as you are. We are trying to get a SONY IMX290 camera (4 lanes) working on an variscite imx8m SOM board. We have some experience with the imx6 so we are not really new in this topics. Unfortunately, the documentation for the CSI in the imx8 manual is really bad.

We tried to change the clock rates, but still get no images.

We checked different status registers such as CSI2RX_IRQ_STATUS with the OV5640 camera board and our custom board without knowing exactly, what it means beacuse it is not documented. With our custom board we see, that a change of the clocks will change the value from 0x8 (this is also read in OV5640) to 0x0. With the given clocks and our custom board we only got the value of 0x8 after changing the hs_settle to 0x6 in 'mxc-mipi-csi2_yav.c'.
Do someone (igorpadykov) know
1. what needs to be changed that the CSI data can record images from other sensors with higher data rates.
2. the relationship of hs_settle and clocks (<&clk IMX8MQ_CLK_CSI2_CORE_DIV>, <&clk IMX8MQ_CLK_CSI2_PHY_REF_DIV>, <&clk IMX8MQ_CLK_CSI2_ESC_DIV>) in the device tree file?
3. What are the limitations of the clocks settings?
4. What clock is meant by clk_ui in the reference manual?

5. Is there a status register that tells us whether or not data comes in at the CSI?

In addition, there is no answer for this post, but the questions are really relevant. (Explanation of pixel-bitrate, CSI1_PHY_REF clk and CSI1_CORE clk from MIPI-CSI2 in i.MX8M? ).

Thank you very much for answering!

Joachim

1,828 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Joachim

unfortunately I am not aware of additional documentation for i.MX8MQ MIPI-CSI2,

though as this is very new product I believe it will be developed in future.

Best regards
igor

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1,828 Views
venkatesh_selva
Contributor II

Hello Everyone,

Can anyone share an example how to add a new custom camera with iMX8MQ? In my case I'm using TOSHIBA TC358840 bridge for HDMI input through MIPI-CSI2 to capture video. Any update in Reference manual for MIPI-CSI2?

Thanks

Venkatesh

1,828 Views
kaartic_sn
Contributor III

Hi,

There seems to be a new version of the reference manual available in the NXP website. I hope there's some information about configuring the clocks there. Let me know if you find something useful.