Camera Max9286 driver issue

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Camera Max9286 driver issue

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xu_ji1
Contributor IV

Hello,

I think the i.MX8Q P9.0.0_2.1.0-AUTO-ga release camera MAX9286 driver has some problem,when I use MAX9286 and four cameras on mek board,I can only use dev/video0 camera,other cameras dev/video1 video2 and video3 can not used.

Does the driver only support one camera?How can support all four cameras?

Please give help.

Thanks

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igorpadykov
NXP TechSupport
NXP TechSupport

it will be fixed in new silicon revision, for schedule please

contact local marketing office.

Best regards
igor

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nxf47746
NXP Employee
NXP Employee

Only 8QM support 4 camera, 8QXP b0 support one.

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xu_ji1
Contributor IV

hello,

What diff 8QM with 8QXP?SW side diff or HW side limited?

Thanks

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nxf47746
NXP Employee
NXP Employee

It is hardware limited, 8QM mipi csi2 support virtual channel, but 8QXP b0 do not support.

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xu_ji1
Contributor IV

What is 8QXP b0?In the released document both 8QM and 8QXP write:

• Stream Multiplexing
• Differentiates multiple cameras from a single 4 lane MIPI input

And from System Block Diagram diff is MIPI CSI2 1x or 2x,others no diff.

Could u explain detail about 8QXP HW limited?

Thanks

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nxf47746
NXP Employee
NXP Employee

8QXP b0 means soc version: b0, currently 8qxp b0 mipi csi2 do not support virtual channel.

Except for virtual channel 0, virtual channels 1, 2, and 3 do not have proper VSYNC timing from MIPI CSI2 when different cameras are multiplexed together. As a result, frames stored in memory can be corrupted due to missing last lines.

This will be fixed lately.

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xu_ji1
Contributor IV

you means 8QXP will fixed it on HW side later?SW side not need changed?

And what is the fixed schedule,could u shared?

Thanks

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Xu

one can look at errata document e50058 :

Virtual channels 1, 2, and 3 do not work normally for multiplexed cameras.

https://www.nxp.com/docs/en/errata/IMX8X_0N95W.pdf 

Best regards
igor

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xu_ji1
Contributor IV

hello,

I think it is not answer my question properly.

Fixed schedule,HW or SW side will fixed?

Thanks

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igorpadykov
NXP TechSupport
NXP TechSupport

it will be fixed in new silicon revision, for schedule please

contact local marketing office.

Best regards
igor

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