Address mapping of IMX6 memory space to external RAM

[hamzafarooq]

Hello all,

I am using IMX6 SDK with the same RAM configuration as Sabre Ai board (i.e. 4 DDR IC's in x64 mode having 4 GBits capacity each). Each IC has 10 coulumns, 15 rows and 8 banks to store 16-bit words in each location. I am having trouble mapping this address space to the virtual address space as seen by the IMX6 (3840 MBytes ranging from 0x10000000 to 0xFFFFFFFF).

From "Table 44-4. Address decoding - bank interleaving off" of the IMX6 reference manual, I have found out the mapping for x32 system but even it has a little confusion. The 3 bits to address banks A[29:27] have initial value 3'b010 since RAM address range is starting from 0x10000000. How does this map to the zeroth bank? and how are all 8 banks accessed with this configuration?

Any help in this regard will be highly appreciated.

Hamza

[Yuri · Accepted solution]

Please take into account two features when considering address decoding :

1. Mapping scheme uses zero address offset and it is assumed that base memory
address of 0x1000_0000 should be added to get real address.

2. When address range of memory is 2G (per CS) low 256 MB memory are not used.

So, total memory available for DDR is 4GB-256MB.

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[hamzafarooq]

Hi,

I will elaborate it with the the answer from Freescale support, that the internal address starting from 0x1000_0000 is mapped to 0x0000_0000. I was confusing the so-called internal address with the external memory addresses. Thank you for kind answer