About the frequency of DRAM_SDCLK

[goto11]

Hello,Community

The DRAM Clock Structure is shown in Fig 5-7 of the iMX7D reference manual.
Is the phy_clk the clock (DRAM_SDCLK) supplied to the DDR memory?

best regards

Goto

[igorpadykov]

Hi Goto

>The DRAM Clock Structure is shown in Fig 5-7 of the iMX7D reference manual.
>Is the phy_clk the clock (DRAM_SDCLK) supplied to the DDR memory?

not. phy_clk is clock supplied to DDR PHY (DDRP) module described

in sect.9.3  i.MX 7Dual Applications Processor Reference Manual

Best regards
igor

[goto11]

Hello,Community

thank you for your answer.
Correct the question.

Is phy_clk the same frequency as the clock (DRAM_SDCLK) supplied to the DDR memory?

Best regards

Goto

[igorpadykov]

Hi Goto

>Is phy_clk the same frequency as the clock (DRAM_SDCLK) supplied to the DDR memory?

no.

Best regards
igor

[igorpadykov]

Hi Goto

>Is phy_clk the same frequency as the clock (DRAM_SDCLK) supplied to the DDR memory?

no.

Best regards
igor

[goto11]

Hello,Community

The reference manual has the following description.

Is phy_clk the same frequency as the clock (DRAM_SDCLK) supplied to the DDR memory?

If not, where is the set frequency reflected as the frequency of the clock (DRAM_SDCLK) supplied to the DDR memory?

best regards

Goto

[igorpadykov]

Hi Goto

this description is applied to clock for DDR controller and PHY, not for

clock supplied to the DDR memory.

no.

Best regards
igor

[igorpadykov]

Hi Goto

this description is applied to clock for DDR controller and PHY, not for

clock supplied to the DDR memory.

no.

Best regards
igor

[igorpadykov]

Hi Goto

this description is applied to clock for DDR controller and PHY, not for

clock supplied to the DDR memory.

no.

Best regards
igor

[goto11 · Accepted solution]

Hello,Community

Where is the set frequency reflected as the frequency of the clock (DRAM_SDCLK) supplied to the DDR memory?

best regards

Goto