About the difference between the power-on sequence of PMIC and CPU.

[okamotosatoshi]

Hello.

I want to check about i.MX6Q.

There is a difference in power sequence the device(CPU side and PMIC side).

①Which(CPU side and PMIC side) is the right power-on sequence?

②It is not  issue in either the power-on sequence ?

Device you are using is the following:

CPU：MCIMX6Q5EYM10AC

Document order number: IMX6DQ6SDLHDG　Rev 1 (2013/06)

Chapter 4  Requirements for Power Management

　4.2 Requirements for a generic interface between chip and PF0100

　　Table 4-1.  Interface between the chip and PF0100

　Page 70-71

PMIC：MMPF0100F0AEP

Document order number: MMPF0100　Rev 7.0 (2013/12)

6 Functional Block Requirements and Behaviors

　6.1.1Device Start-up Configuration

　　Table 10.  Start-up Configuration

　Page 20-21(Pre-programmed OTP Configuration：F0)

③Why is there a difference in the PMIC and CPU?

Regards,

-okamoto

[JorgeRama_rezRi]

Hi Okamoto-san,

The PF0100 power defaults in IMX6DQ6SDLHDG are just an example of how to interface it with the i.MX6 processor and are not based in any Fx version of the PF0100. They are actually based in the processor power requrements contained in the processor datasheet (IMX6DQAEC). If you want to use the F0 version of the PF0100 as we do in our reference designs, it will work. Or if you want to program the PF0100 with the values in IMX6DQ6SDLHDG, it will work too. After all, the default voltage values you should use are the ones that better adjust to your application needs, as long as the voltage and power-up sequence requirements in IMX6DQAEC are met.

Best regards.

Jorge.

[okamotosatoshi]

Hi, Jorge

Thank you for reply.

I use the "F0" of PF0100.

In other words, do you no issue following the power sequence of PF0100?

Further, it is power-up sequence of "IMX6DQ6SDLHDG" is one example, and need not be complied with.

i.MX6Q do is that you should be careful only power-up sequence?

(IMX6DQCEC Rev 2.3 - P30　4.2.1Power-up sequence)

Regards,

-okamoto

[JorgeRama_rezRi · Accepted solution]

Hi Okamoto,

Correct, you can use the power-up sequence of PF0100 F0 and you won't have any issues.

And yes, the power-up sequence of IMX6DQ6SDLHDG is just an example and doesn't necessarily need to be followed. The one in IMX6DQCEC Rev 2.3 - P30 is the one that needs to be followed. Please also check page 20, which specifies the voltage levels for each voltage rail.

Best regards.

Jorge.

[okamotosatoshi]

Hi, Jorge

Thank you for reply.

I appreciate the advice.

According to the supply sequence of PMIC, I will design.

Regards,

-okamoto

[jamesbone]

reyes.  Any suggestions?

[okamotosatoshi]

Hi, jamesbone

Thank you for reply.

No, I will not.

I want to know whether we should follow the sequence of power either.

In addition, I want to know why there is a difference in power sequence.(CPU or PMIC)

Regards,

-okamoto