About input the clock with spread spectrum in i.MX6DQ.

[keitanagashima]

Dear All,

Hello. I have a question about input the clock with spread spectrum via MIPI-CSI2 in i.MX6DQ.

Refer to attached file.

And answer to me.

Best Regards,

Keita

[art · Accepted solution]

The MIPI-CSI2 module of i.MX6Dual/Quad processors is compliant with the MIPI Alliance Specification for D-PHY, Version 1.00.00 - 14 May 2009. In particular, this specification says the following.

"The Master side of the Link shall send a differential clock signal to the Slave side to be used for data sampling. This signal shall be a DDR (half-rate) clock and shall have one transition per data bit time. All timing relationships required for correct data sampling are defined relative to the clock transitions. Therefore, implementations may use frequency spreading modulation on the clock to reduce EMI".

According to this, it seems to be possible to apply 1% spread spectrum clock to the i.MX6Dual/Quad MIPI-CSI2 clock input.

Have a great day,
Artur

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