About QuadSPI serial flash BOOT

[goto11]

Hello,community

About QuadSPI serial flash BOOT in i.MX 7 Dual Applications Processor Reference Manual
It is described that QUAD enable bit is set before BOOT starts.
Is it possible to set up to QUAD enable bit in BOOT?

If you can set it, please tell me how.

Extracted QuadSPI serial flash BOOT operation in Section 6.6.6.2

For the QUAD mode boot, the Boot ROM expects the Quad Enable bit inside the QSPI flash to be already set before the booting starts. Therefore, the QUAD enable bit must be set in the non-volatile register of the flash at the time of programming.

Best Regards,
Goto

[Yuri]

Hello,

   As stated in i.MX 7Dual Reference Manual (RM), Rev. 1, 01/2018:

If the SPI flash device requires the quad enable command, it
can be sent via these configuration structure fields:
device_quad_mode_en, device_cmd, write_cmd_ipcr,
write_enable_ipcr, busy_bit_offset, and read_status_ipcr.

  So, customers should properly write the parameters, described

in section 6.6.6.3 (QuadSPI configuration parameters) of the RM.

  The ROM expects the QuadSPI configuration parameters (as explained in the QuadSPI
Configuration Parameters) to be present in the serial flash memory from the offset 0x400
of serial flash of length 512 bytes. The ROM reads these configuration parameters using
the default read command configured in the LUT of the QuadSPI interface with the
SCLOCK operating at 20 MHz.
In the second step, the ROM configures the selected QuadSPI interface with the
configuration parameters read from the serial flash and starts the boot procedure.

Regards,

Yuri.

[goto11]

Hi,

It is standard SPI interface until Quad Enable bit of SPI flash device is set.
Can configuration parameters be read from standard SPI interface device?

Regards,

Goto

[Yuri · Accepted solution]

Yes.