About IMX8mm evk device tree

[liwentao_1117]

fsl-imx8mm-evk.dts

uart1: serial@30860000S {
compatible = "fsl,imx8mm-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x0 0x30860000 0x0 0x10000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_UART1_ROOT>,
<&clk IMX8MM_CLK_UART1_ROOT>;
clock-names = "ipg", "per";
dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>;
dma-names = "rx", "tx";
status = "disabled";
};

&uart1 { /* BT */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
assigned-clocks = <&clk IMX8MM_CLK_UART1_SRC>;
assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
fsl,uart-has-rtscts;
resets = <&modem_reset>;
status = "okay";
};

I wonder what the assigned-clocks do

[joanxie]

refer to the latest bsp

https://github.com/nxp-imx/linux-imx/blob/lf-6.1.y/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi

the clk uses IMX8MM_CLK_UART, for more detailed information about this clock, you can refer to the reference manual, this is uart1 root clock