8MPLUSLPD4-CPU LPDDR4 CKE Connection

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

8MPLUSLPD4-CPU LPDDR4 CKE Connection

跳至解决方案
1,701 次查看
shimpei_sonoda
Contributor I

Hi

I designed the new product with reference to the i.MX 8M Plus evaluation board "8MPLUSLPD4-CPU".  The file name is SPF-46368_A3.pdf.

In "8MPLUSLPD4-CPU", the Data signals of the LPDDR4 Ch.A output by the SoC are byte-swapped and connected to the DRAM. However, the CKE signals are not swapped. Should the CKEs be swapped? 

Thank you for your reply.

0 项奖励
回复
1 解答
1,694 次查看
Yuri
NXP Employee
NXP Employee

@shimpei_sonoda 
Hello,

DRAM_CKE0_A corresponds DRAM_nCS0_A;
DRAM_CKE1_A corresponds DRAM_nCS1_A.

  Data lanes swapping are not affected here.

 

Regards,
Yuri.

在原帖中查看解决方案

1 回复
1,695 次查看
Yuri
NXP Employee
NXP Employee

@shimpei_sonoda 
Hello,

DRAM_CKE0_A corresponds DRAM_nCS0_A;
DRAM_CKE1_A corresponds DRAM_nCS1_A.

  Data lanes swapping are not affected here.

 

Regards,
Yuri.