8MPLUSLPD4-CPU LPDDR4 CKE Connection

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8MPLUSLPD4-CPU LPDDR4 CKE Connection

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shimpei_sonoda
Contributor I

Hi

I designed the new product with reference to the i.MX 8M Plus evaluation board "8MPLUSLPD4-CPU".  The file name is SPF-46368_A3.pdf.

In "8MPLUSLPD4-CPU", the Data signals of the LPDDR4 Ch.A output by the SoC are byte-swapped and connected to the DRAM. However, the CKE signals are not swapped. Should the CKEs be swapped? 

Thank you for your reply.

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Yuri
NXP Employee
NXP Employee

@shimpei_sonoda 
Hello,

DRAM_CKE0_A corresponds DRAM_nCS0_A;
DRAM_CKE1_A corresponds DRAM_nCS1_A.

  Data lanes swapping are not affected here.

 

Regards,
Yuri.

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Yuri
NXP Employee
NXP Employee

@shimpei_sonoda 
Hello,

DRAM_CKE0_A corresponds DRAM_nCS0_A;
DRAM_CKE1_A corresponds DRAM_nCS1_A.

  Data lanes swapping are not affected here.

 

Regards,
Yuri.