This article is an example for users to change the DDR clock on i.MX6ULL board
Environment:
- Hardware : i.MX6ULL EVK board
Concept of MMDC controller clock source on i.MX6ull
Consult Chapter 18 Clock Controller Module(CCM) in the I.MX 6ull reference manual. The MMDC clock source is shown in Figure 23.3.3.1:
Figure 23.3.3.1 MMDC Clock Source
Figure 23.3.3.1 shows the clock source path diagram of MMDC, which is mainly divided into three parts.
1. CBCMR[PRE_PERIPH2_CLK_SEL] : The pre_periph2 clock selector, which is the pre-selector of periph2_clkd, is controlled by the PRE_PERIPH2_CLK_SEL bit (bit22:21) of the CBCMR register.
2. CBCDR[PERIPH2_CLK_SEL] : periph2_clk clock selector, controlled by the PERIPH2_CLK_SEL bit (bit26) of the CBCDR register,When it is 0, pll2_main_clk is selected as the clock source of periph2_clk. When it is 1, periph2_clk2_clk is selected as the clock source of periph2_clk.
3. CBCDR[FABRIC_MMDC_PODF] : It is a frequency divider. The frequency division value is set by the FABRIC_MMDC_PODF bit (bit5:3) of the CBCDR register. It can be set to 0~7, corresponding to 1~8 frequency divisions respectively. To configure the clock source of the MMDC to 396MHz, it must be set to 1 here, so FABRIC_MMDC_PODF=0.
The above is the clock source setting of MMDC.
Implementation
Step 1 : git clone the uboot code from NXP github web
$ git clone https://github.com/nxp-imx/uboot-imx.git
Step 2 : Modify the different frequencies of DDR by modifying the following files : uboot-imx/board/freescale/mx6ullevk/imximage.cfg
As default BSP code, our DDR run frequency is 400MHz (Actually, it's 396MHz), If you want DDR to boot at 132MHz, we need to configurate the CCM_CBCDR[FABRIC_MMDC_PODF] bit, from this bit content, we need to set it to 010. The frequency division value is 3 based on 396MHz
Change code as following: DATA 4 0x020c4014 0x00018910, Add this code in imximage.cfg file.
Step 3 : Re-compile the uboot and flash the uboot to the board.
Result
Now, We can see that DDR is running at successfully at 132MHz.
Before modification:
After modification:
