Hi
It seems that I discovered the error.
I began to analyze each one of the frames that the DH sends and the PN7150 responds until I reach the clock configuration (NXP_CLK_CONF)
I was configuring as PLL
uint8_t NxpNci_CLK_CONF[] =
{
0x20, 0x02, 0x09, 0x02, /* CORE_SET_CONFIG_CMD */
0xA0, 0x03, 0x01, 0x11, /* CLOCK_SEL_CFG */
0xA0, 0x04, 0x01, 0x01 /* CLOCK_TO_CFG */
};
But my hardware uses a 27.12MHz crystal and the setting must be Xtal
uint8_t NxpNci_CLK_CONF[] = {
0x20, 0x02, 0x05, 0x01, /* CORE_SET_CONFIG_CMD */
0xA0, 0x03, 0x01, 0x08 /* CLOCK_SEL_CFG */ };
I thought that this mistake was not going to solve the problem, but after correcting it and checking just in case the error was repeated, to my surprise, it works fine.