 
					
				
		
Dear Forum members,
In the "Vybrid Referense Manual(Rev 5)", "26.6 WDOG Memory Map/Register Difinition",
it says WDOG_WCR register absolute address is 0x0.
However, I can't access to the register and I think that address is odd.
Because at "3.1 System memory map", it says 0x0 to 0x7fffff is memory map for Boot ROM.
Dose anyone know the absolute address of WDOG_WCR is really 0x0?
(or I'm misunderstanding the reference manual?)
Regards,
Makoto Katsukura
Solved! Go to Solution.
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Definitely the WDOG base address should not be 0u. Replace that WDOG_BASE definition with something like this:
#ifdef ARMCC_A5
#define WDOG_BASE (0x4003E000u)
#else /* M4 */
#define WDOG_BASE (0x4004F000u)
#endif
You can check Section 3.2 Peripheral Bridge 0 (AIPS-Lite 0) Memory Map in RM
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Definitely the WDOG base address should not be 0u. Replace that WDOG_BASE definition with something like this:
#ifdef ARMCC_A5
#define WDOG_BASE (0x4003E000u)
#else /* M4 */
#define WDOG_BASE (0x4004F000u)
#endif
You can check Section 3.2 Peripheral Bridge 0 (AIPS-Lite 0) Memory Map in RM
 
					
				
		
Hi Juan,
there is actually a typo in your code, it should be as follows (notice M4 address):
#ifdef ARMCC_A5
#define WDOG_BASE (0x4003E000u)
#else /* M4 */
#define WDOG_BASE (0x4003F000u)
#endif
Why isn't this issue fixed in MQX 4.1.0? Wasn't it reported?
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		I was not aware this was also in MQX. This was corrected or at list notified for our Vybrid Sample code but not for MQX.
Are you sure this is a problem for MQX. I mean is not handled different in MQX?
 
					
				
		
Yes, in mqx\source\psp\MVF50GS10MK50.h (in both MQX 4.0.2 and MQX 4.1.0), there is the following:
/* WDOG - Peripheral instance base addresses */
/** Peripheral WDOG base pointer */
#define WDOG_BASE_PTR ((WDOG_MemMapPtr)0u)
Besides the fact the address is absurd, there is also no conditioning for A5/M4 core. And in RM Rev.5, it is the same (see section 26.6). After the address fix, everything works as expected.
Obviously Freescale prefers SW watchdog, but I don't consider that to be a good solution, definitely not on multicore where some incautious operation of SW on one core can immediately kill the SW on second core.
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Hi Petr
Would you have a simple sample that show the WDOG functionality, that you can share, please?
 
					
				
		
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Great!
Thanks Petr :smileyhappy:
 
					
				
		
 juangutierrez
		
			juangutierrez
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Ok, thanks Petr
I will be checking and reporting this to the MQX team.
