Hello all,
I found an inconsistency in Vybrid Reference Manual Rev. 5 07/2013 in chapter 11.21.27 ANADIG PLL Lock register (ANADIG_PLL_LOCK) , where the field and the description aren't matching. E.g. field 6 PLL1, where the description says PLL7 is locked or not locked. I just wanted to inform You and I'm not sure if I'm right at this community place. :smileyhappy:
Have a nice day!
Regards,
Kamil
Solved! Go to Solution.
Thanks, Kamil, for your caring - we collect such feedback from the field.
Unfortunately, not always documentation is perfect... especially for newly launched products... and if it contains a few thousand pages... this is why we revise it periodically to eventually have it clean and consistent.
If such discrepancy occurs, we strongly recommend to look into our BSP software: since it runs on a working board, that guarantees the used settings' correctness.
Sincerely yours, Naoum Gitnik.
Thanks, Kamil, for your caring - we collect such feedback from the field.
Unfortunately, not always documentation is perfect... especially for newly launched products... and if it contains a few thousand pages... this is why we revise it periodically to eventually have it clean and consistent.
If such discrepancy occurs, we strongly recommend to look into our BSP software: since it runs on a working board, that guarantees the used settings' correctness.
Sincerely yours, Naoum Gitnik.