Vybrid Non Xip Qspi Boot

[ngsari]

Hello Folks;
MQX QSPI Non-Xip boot works just fine.
However I would like place some MQX librarys in the QSPI FLash. I don't want load them in to the Internal SRAM.

What should I do with Scatter file ? (MQX BSP and PSP must placed in RAM)

I tried to add some load / execution regions with base 0x20040000. Doesn't seems to work. (Or generate 512MB Image file)

Thank you for time.

#! armcc -E --cpu Cortex-A5.neon


#define CODE_BASE_ADDR_START     0x3F000000
#define CODE_BASE_ADDR_END       0x3F03FFF0
#define CODE_SIZE               (CODE_BASE_ADDR_END - CODE_BASE_ADDR_START)


#define DATA_BASE_ADDR_START     0x3F050000
#define DATA_BASE_ADDR_END       0x3F070000
#define DATA_SIZE               (DATA_BASE_ADDR_END - DATA_BASE_ADDR_START)


#define DATA_SHARED_START       0x3F040000
#define DATA_SHARED_END         0x3F04FFF0


#define RESERVED_BASE_ADDR_START    0x3F07EBF0
#define RESERVED_BASE_ADDR_END      0x3F07EFF0
#define RESERVED_SIZE               (DATA_BASE_ADDR_END - DATA_BASE_ADDR_START)


#define BOOT_STACK_SIZE         0x100
#define FIQ_STACK_SIZE          0
#define ABT_STACK_SIZE          0
#define UND_STACK_SIZE          0
#define SYS_STACK_SIZE          0




QUAD_SPI_CONFIG CODE_BASE_ADDR_START 
{ 
   CONF +0 0x400
  {

    *(.conf)
  }
}


BOOT_IVT_HEADER_OFFSET (CODE_BASE_ADDR_START + 0x400)
{
  IVT +0  0x20
  {
  *(.ivt)
  }

  BOOT_DATA +0 0x10
  {
  *(.boot_data)
  }

  DCD +0
  {
  *(.dcd)
  }
}


LOAD_REGION_CODE (CODE_BASE_ADDR_START + 0x800)
{
    BOOT +0
    {
        *(STARTUP)
    }

    CODE +0
    {
        * (InRoot$$Sections)      ; All library sections for example, __main.o,
                                  ; __scatter*.o, __dc*.o, and * Region$$Table
  * (KERNEL)
        * (TEXT)
        * (+RO)
    }


    DATA DATA_BASE_ADDR_START ALIGN 32 
    {
        * (+RW, +ZI)
    }


    ; FIQ stack
    FIQ_STACKS +0 ALIGN 8 EMPTY FIQ_STACK_SIZE {}
    ; ABT stack
    ABT_STACKS +0 ALIGN 8 EMPTY ABT_STACK_SIZE {}
    ; UND stack
    UND_STACKS +0 ALIGN 8 EMPTY UND_STACK_SIZE {}
    ; SYS stack
    SYS_STACKS +0 ALIGN 8 EMPTY SYS_STACK_SIZE {}


    KERNEL_DATA_START +0 ALIGN 16
    {
        * (KERNEL_DATA_START)     ; start of kernel data
        * (SRAM_POOL_START)
        * (UNCACHED_DATA_START)
    }


    KERNEL_DATA_END DATA_BASE_ADDR_END - (0x03*0x10)      ; RAM_END - 3 x aligned value with align 0x04 
    {
        * (SRAM_POOL_END)
        * (UNCACHED_DATA_END)
        * (KERNEL_DATA_END)     ; end of kernel data
    }

    SHARED_RAM_START DATA_SHARED_START 0xFFF0
    {
  *(SHARED_RAM_START)
    }


    SHARED_RAM_END DATA_SHARED_END
    {
        *(SHARED_RAM_END)
    }

    ; mem_init writes a storeblock_struct at the end of kernel data,
    ; max size 32 bytes, so use 0x100 offset



    BOOT_STACK_ADDR (DATA_BASE_ADDR_END - BOOT_STACK_SIZE) OVERLAY
    {
        *(BOOT_STACK)
    }


    ; We don't use their stack or heap, but the tools expect this
    ; to be here, so we have a dummy placeholder.
    ARM_LIB_STACKHEAP (DATA_BASE_ADDR_END - 0x100) OVERLAY EMPTY UNINIT 0x04 
    { }


    RESERVED RESERVED_BASE_ADDR_START ALIGN 16
    {
        * (.boot_reserved_data)
        * (.boot_reserved_code)
    }
}

[timesyssupport · Accepted solution]

Hello,

Have you set the BSPCFG_ENABLE_QUADSPI0 macro to '1' in your BSP config? Can you try another address in the 0x20000000-0x2fffffff range? Let me know.

Thanks,

Timesys Support

[ngsari]

Yes I did. Because of that I have put  MQX kernel in ram.
I'm going to try. Thank you for your time.

[karina_valencia]

timesyssupport can you help with this case?