VF6xx VYBRID Cortex-M4 Cache sample code

[wushengjiang]

Is there any sample for VF6xx VYBRID Cortex-M4 cache operation?

It seems data cache operation is not success when debug with network on Cortext-M4, network packet loss when data cache is on, after disable data cache on Cortex-M4, no packet loss.

The same code works well on Cortex-A5 side which has PL310 L2 cache.

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[timesyssupport]

Hello Wu,

Presumably you are working with MQX in this case? There is the following, which tests some cache operations: mqx/examples/benchmrk/codesize/main.c

karinavalencia​ - if this is MQX, can the MQX team review?

Thank you,

Timesys Support

[wushengjiang]

Thanks for all your help, I found the cache.c under folder mqx\source\psp\cortex_m, I will compare it with current driver.

[karina_valencia]

Lets wait the update from Wu.

[karina_valencia]

timesyssupport​ an you help here?