Does anyone have any figures for the read performance of the NAND flash controller, when used with 32 bit error correction? I am interested in the added latency of the error correction, including any software overhead (in plain English, how much does it take to do the error correction on a block of memory).
Zoltan
Solved! Go to Solution.
Hello Zoltan,
On the Vybrid Tower module, we have not yet collected NAND performance statistics, with/without ECC. We only have Rev. E hardware on hand at this moment, our Rev. G is currently unavailable for testing purposes. Once it returns, we can put together some test figures as they apply to the VF6xx Tower module.
Regards,
Timesys Support
See: VF6xxx NFC (NAND) module clocking, where I give some numbers and code to improve it.
Hello Zoltan,
On the Vybrid Tower module, we have not yet collected NAND performance statistics, with/without ECC. We only have Rev. E hardware on hand at this moment, our Rev. G is currently unavailable for testing purposes. Once it returns, we can put together some test figures as they apply to the VF6xx Tower module.
Regards,
Timesys Support
timesyssupport are you available to help on this case?