How do I implement a soft reset on Vybrid running MQX? On Cortex M I know that a specific register (AIRCR) is used for system wide reset from within software. Is there any similar way on the Cortex A5? Or is this done from the Cortex-M4 on the Vybrid? Anyone has an example they could share?
Regards,
Flavio
解決済! 解決策の投稿を見る。
Hi,
for software reset use SW_RST bit in SRC Control Register (SRC_SCR). See chapter 18.3.2 in Vybrid RM.
Regards
Rene
Hi Flavio,
In the below discussion you can get more information regarding software reset. Reset A5 without interfering on M4
Please keep us informed if using the SW_RST helped you.
/Alejandro
Thanks Rene, it worked. Yet there is an unwanted side effect. The MQX and IAR debugger don't keep synch after the reset. I suppose it is because there is no memory repair sequence after a soft reset, or IAR doesn't know what to do after the soft reset.
Regards,
Flavio Caduda
Hi,
for software reset use SW_RST bit in SRC Control Register (SRC_SCR). See chapter 18.3.2 in Vybrid RM.
Regards
Rene
karinavalencia, can you help us expediting this request?
rendy can you help here?