Watchdog Timer implementation

[dheeraj_07]

We are using an NXP QorIQ T2080 processor and want to implement the internal Watchdog Timer.

Please clarify:

1. How to enable the internal Watchdog Timer. Any recommended flow?
2. Whether the Watchdog Timer is core-specific or common for the full processor?
3. Does watchdog timeout internally reset the processor, or does it assert any external reset/request pin?

[June_Lu]

Each core has an internal watchdog timer. Depending on the values programmed in TCR[WRC] and EDBCR0[EDM], four different actions can be taken upon a watchdog timer expiration, including automatic reset of the corresponding core and assertion of RESET_REQ_B.

For more details, please refer to QorIQ T2080 Reference Manual,  Section 7.3.6.1 “Watchdog Timer Expiration Out to Platform.”

Thanks.