Hi All,
I am using T4240RDB-64B Machine. I want to configure Local Access Window (LAW) for Dual Data Rate (DDR), Integrated Flash Controller (IFC) and DCSR.
I am using CodeWarrior Flash Programmer and Lauterbach Trace32 Debugger for Debugging support.
Please give the detailed explanation for Configure the LAW register to DDR and IFC.
Thank you for all ......!
Regards, VinothS
Solved! Go to Solution.
To configure Local access window for each mentioned memory space, you have to set 3 registers - LAW_LAWBARHn, LAW_LAWBARLn and LAW_LAWARn. For detailed field descriptions in these registers please look T4240 Reference Manual, Section 2.4
The example configuration for T4240RDB can be taken from CodeWarrior target initialization file for this board:
## LAW0 to DDRC1
# LAWBARH
mem [CCSR_ADDR 0x000C00] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C04] = 0x00000000
# LAWAR
if {$processor_revision == 1} {
# Memory complex 1
mem [CCSR_ADDR 0x000C08] = 0x810000${DDR_LAW_SIZE}
} else {
# Interleaved Memory Complex 1-3
mem [CCSR_ADDR 0x000C08] = 0x817000${DDR_LAW_SIZE}
}
## LAW3 to IFC - NAND
# LAWBARH
mem [CCSR_ADDR 0x000C30] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C34] = 0xFF800000
# LAWAR
mem [CCSR_ADDR 0x000C38] = 0x81f00013
## LAW4 to DCSR
# LAWBARH
mem [CCSR_ADDR 0x000C40] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C44] = 0xC0000000
# LAWAR
mem [CCSR_ADDR 0x000C48] = 0x81D0001c
Please look [your CodeWarrior installation folder] \PA\PA_Support\Initialization_Files\QorIQ_T4\T4240RDB_init_core_cacheon.tcl
Have a great day,
Alexander
TIC
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To configure Local access window for each mentioned memory space, you have to set 3 registers - LAW_LAWBARHn, LAW_LAWBARLn and LAW_LAWARn. For detailed field descriptions in these registers please look T4240 Reference Manual, Section 2.4
The example configuration for T4240RDB can be taken from CodeWarrior target initialization file for this board:
## LAW0 to DDRC1
# LAWBARH
mem [CCSR_ADDR 0x000C00] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C04] = 0x00000000
# LAWAR
if {$processor_revision == 1} {
# Memory complex 1
mem [CCSR_ADDR 0x000C08] = 0x810000${DDR_LAW_SIZE}
} else {
# Interleaved Memory Complex 1-3
mem [CCSR_ADDR 0x000C08] = 0x817000${DDR_LAW_SIZE}
}
## LAW3 to IFC - NAND
# LAWBARH
mem [CCSR_ADDR 0x000C30] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C34] = 0xFF800000
# LAWAR
mem [CCSR_ADDR 0x000C38] = 0x81f00013
## LAW4 to DCSR
# LAWBARH
mem [CCSR_ADDR 0x000C40] = 0x00000000
# LAWBARL
mem [CCSR_ADDR 0x000C44] = 0xC0000000
# LAWAR
mem [CCSR_ADDR 0x000C48] = 0x81D0001c
Please look [your CodeWarrior installation folder] \PA\PA_Support\Initialization_Files\QorIQ_T4\T4240RDB_init_core_cacheon.tcl
Have a great day,
Alexander
TIC
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Alexander,
Thank you for quick reply.
As per your suggestion, T4240RDB_init_core_cacheon.tcl
The following file applicable for Lauterbach script also.
LAW0 to DDR
LAW4 to DCSR
Is it right ?
Thanks & Regards,
VinothS
Yes, but - it is up to designer, which number of local access window to use for which target.
In this CodeWarrior script this is done in this way. In your case you can use another numbers.
Hi Alexander,
Thank you for your reply....
Regards,
VinothS