RGMII phy interfacing

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

RGMII phy interfacing

3,404 Views
faizmajeed
Contributor III

HI!

I am using T1042 processor and interfacing KSZ9031RNX phy as RGMII transceiver. I have connected its pins to the processor according to my understanding after reading its datasheet. I am finding no document related to phy interfacing to T1042 processor. There is no chapter in the reference manual to describe its registers and other configurations.

1) Please suggest me some document related to Ethernet controller interfacing with phy as RGMII

2) I have attached an excel sheet for pin connections. please check it and inform me if there is any incorrect connection

Labels (1)
Tags (1)
0 Kudos
3 Replies

729 Views
alexander_yakov
NXP Employee
NXP Employee

For the recommended RGMII interface connection to PHY please look schematic of our T104xRDB board.

Board schematic is available for download as a part of design files package, from T1040RDB board product page, "Software & Tools" tab:

QorIQ T1040 Reference Design Board|NXP 

Please let me know in case of any further questions.


Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos

729 Views
faizmajeed
Contributor III

Thanks Alexander. Actually i am using a different phy ( KSZ9031RNX ). i have almost completed its pin connections, just tell me what voltages should i give at AVDDH and DVDDH of  KSZ9031RNX phy to make its i/o voltages compatible with my processor ethernet controller voltages.

And also i want to study about processor ethernet controller and its registers like IFC and its registers are given in detail in the reference manual, but there is no section like this to explain ethernet controller. 

0 Kudos

730 Views
alexander_yakov
NXP Employee
NXP Employee

In general, PHY I/O voltage must be the same as I/O voltage on MAC side, for T1040 this interface is specified at 2.5V or 1.8V, so PHY I/O voltage must be the same - ether 1.8V or 2.5V, depending on which voltage is selected at T1040 side. This is for DVDDH voltage in terms of KSZ9031RNX PHY documentation. For AVDDH you should use 3.3V or 2.5V, this is analog power supply, used for analog circuits, and not related to digital interface between PHY and MAC. Datasheet says: "2.5V AVDDH is recommended for commercial temperature range (0°C to +70°C) operation only."

Sorry, we do not have any experience with PHY KSZ9031RNX, and my response is based on information from PHY datasheet only, so it will be better to ask these questions to PHY vendor to double-check.


Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos