Probability for CPU producing identical data in lockstep architecture?

[Xingzi]

If there is lockstep design to monitor the CPU T2081 output, what is the probability defeating the lockstep mechanism such as producing the identical erroneous data?

For example, if the data size of CPU output is 64 bits, could the probability of 2 CPUs producing the same erroneous data is 1/64*P(CPU0 Error)*P(CPU1 Error)?

The factor 1/data length could be used? Or what is the factor if not?

[yipingwang]

There are no hardware provisions for that in any T-series or P-series processor and no recommendations for implementing it are available.