Hi Everyone,
As part of the platform cache flushing procedure, the T1042 RM states that "Clear all bits in CPCPAR0-CPCPAR15 " but we couldn;t find the base address of CPCPAR in the reference manual.
it looks like it was removed :
I know (using the Trace32) that the base address for CPC_PAR0 is CROSSBAR_ADR+0x10208, but we need to confirm this with NXP to document it as a rational.
thank you
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