IFC NAND not detecting in u-boot and linux

[vinothkumars]

Hi All,

I am working IFC NAND on T4160RDB-64B machine. I checked NAND driver loading properly. But, NAND device is not  detecting in u-boot as well as linux,

NAND Chip : MT29F8G08ABABAWP

NAND Connection: IFC_CS1

U-boot Log,

   NAND: fsl-ifc: Failed to Initialise SRAM
   0 MiB

=> help nand

nand - NAND sub-system

Usage:

nand info - show available NAND devices

nand device [dev] - show or set current device

nand read - addr off|partition size

nand write - addr off|partition size

    read/write 'size' bytes starting at offset 'off'

    to/from memory address 'addr', skipping bad blocks.

nand read.raw - addr off|partition [count]

nand write.raw - addr off|partition [count]

    Use read.raw/write.raw to avoid ECC and access the flash as-is.

nand erase[.spread] [clean] off size - erase 'size' bytes from offset 'off'

    With '.spread', erase enough for given file size, otherwise,

    'size' includes skipped bad blocks.

nand erase.part [clean] partition - erase entire mtd partition'

nand erase.chip [clean] - erase entire chip'

nand bad - show bad blocks

nand dump[.oob] off - dump page

nand scrub [-y] off size | scrub.part partition | scrub.chip

    really clean NAND erasing bad blocks (UNSAFE)

nand markbad off [...] - mark bad block(s) at offset (UNSAFE)

nand biterr off - make a bit error at offset (UNSAFE)

=> nand info

=> nand device

no devices available

=> nand dump

no devices available

=>

Linux Log,

fsl-ifc: Failed to Initialise SRAM
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300)
ata2.00: ATA-8: 8GB NANDrive, D A431F4, max UDMA/133
ata2.00: 15649200 sectors, multi 0: LBA48
ata2.00: configured for UDMA/133
scsi 1:0:0:0: Direct-Access ATA 8GB NANDrive 31F4 PQ: 0 ANSI: 5
sd 1:0:0:0: [sda] 15649200 512-byte logical blocks: (8.01 GB/7.46 GiB)
sd 1:0:0:0: Attached scsi generic sg0 type 0
sd 1:0:0:0: [sda] Write Protect is off
sd 1:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
sd 1:0:0:0: [sda] Attached SCSI disk
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff80 beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
fsl,ifc-nand fff800000.nand: fsl_ifc_read_byte: beyond end of buffer
nand: Could not find valid ONFI parameter page; aborting
fsl,ifc-nand fff800000.nand: NAND Flash Timeout Error
nand: No NAND device found

Driver code,

Checking and compare the revision number and I don't know what is the purpose of this particular part (mentioned in code)

static int fsl_ifc_sram_init(uint32_t ver)
{
      struct fsl_ifc_runtime *ifc = ifc_ctrl->regs.rregs;
      uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
      uint32_t ncfgr = 0;
      u32 timeo = (CONFIG_SYS_HZ * 10) / 1000;
      u32 time_start;

   if (ver > FSL_IFC_V1_1_0) {
   ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr);
   ifc_out32(&ifc->ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN);

   /* wait for SRAM_INIT bit to be clear or timeout */
   time_start = get_timer(0);

   while (get_timer(time_start) < timeo) {
   ifc_ctrl->status =
   ifc_in32(&ifc->ifc_nand.nand_evter_stat);

   if (!(ifc_ctrl->status & IFC_NAND_SRAM_INIT_EN))
   return 0;
   }
   printf("fsl-ifc: Failed to Initialise SRAM\n");
   return 1;
   }

   cs = ifc_ctrl->cs_nand >> IFC_NAND_CSEL_SHIFT;

   /* Save CSOR and CSOR_ext */
   csor = ifc_in32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor);
   csor_ext = ifc_in32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor_ext);

   /* chage PageSize 8K and SpareSize 1K*/
   csor_8k = (csor & ~(CSOR_NAND_PGS_MASK)) | 0x0018C000;
   ifc_out32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor, csor_8k);
   ifc_out32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor_ext, 0x0000400);

   /* READID */
   ifc_out32(&ifc->ifc_nand.nand_fir0,
   (IFC_FIR_OP_CW0 << IFC_NAND_FIR0_OP0_SHIFT) |
   (IFC_FIR_OP_UA << IFC_NAND_FIR0_OP1_SHIFT) |
   (IFC_FIR_OP_RB << IFC_NAND_FIR0_OP2_SHIFT));
   ifc_out32(&ifc->ifc_nand.nand_fcr0,
   NAND_CMD_READID << IFC_NAND_FCR0_CMD0_SHIFT);
   ifc_out32(&ifc->ifc_nand.row3, 0x0);

   ifc_out32(&ifc->ifc_nand.nand_fbcr, 0x0);

   /* Program ROW0/COL0 */
   ifc_out32(&ifc->ifc_nand.row0, 0x0);
   ifc_out32(&ifc->ifc_nand.col0, 0x0);

   /* set the chip select for NAND Transaction */
ifc_out32(&ifc->ifc_nand.nand_csel, ifc_ctrl->cs_nand);

/* start read seq */
ifc_out32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT);

time_start = get_timer(0);

while (get_timer(time_start) < timeo) {
ifc_ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat);

if (ifc_ctrl->status & IFC_NAND_EVTER_STAT_OPC)
break;
}

if (ifc_ctrl->status != IFC_NAND_EVTER_STAT_OPC) {
printf("fsl-ifc: Failed to Initialise SRAM\n");
return 1;
}

ifc_out32(&ifc->ifc_nand.nand_evter_stat, ifc_ctrl->status);

/* Restore CSOR and CSOR_ext */
ifc_out32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor, csor);
ifc_out32(&ifc_ctrl->regs.gregs->csor_cs[cs].csor_ext, csor_ext);

return 0;
}

Regards, VinothS

[vinothkumars]

This is the problem in the NAND Flash Controller. I closed this thread now.

Regards,

VinothS

[vinothkumars]

This is the problem from hardware side. Now I currently close this thread.

Thanks & Regards,

VinothS

[vinothkumars]

Hi All,

I fixed in code side,

/*

if (ifc_ctrl->status != IFC_NAND_EVTER_STAT_OPC) {
printf("fsl-ifc: Failed to Initialise SRAM\n");
return 1;
}

*/

Now I got NAND chip detected,

=> nand device

Device 0: nand0, sector size 512 KiB
Page size 4096 b
OOB size 224 b
Erase size 524288 b
subpagesize 4096 b
options 0x 200
bbt options 0x 20000

=> nand erase 0 0x10000

NAND erase: device 0 offset 0x0, size 0x10000

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

I got Flash Time Out Error 

Regards, VinothS

[vinothkumars]

Hi All,

I want to use nand  commands to erase, read and write.

Here, I have some doubts.

May I want to do the following

1. mtd partition (to store the image in kernel)

2. build binary for nand or we use some other (example binary to do the nand write and nand read) 

Is my observation wright ?

Regards, VinothS

[vinothkumars]

Hi All,

Please provide the details to fix the following errors,

=> nand erase 0 0x10000

NAND erase: device 0 offset 0x0, size 0x10000

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

fsl_ifc_run_command: Flash Time Out Error

What is the purpose of this  " IFC_NAND_EVTER_STAT_OPC " in NAND ?

Regards,

VinothS

[vinothkumars]

Hi, 

  Any Update ?

[vinothkumars]

Dear NXP,

Still, I am facing the same problem.  

What is the purpose of this  " IFC_NAND_EVTER_STAT_OPC " in NAND?

Regards,

VinothS